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[209.132.180.67]) by mx.google.com with ESMTP id t1si23685831pdi.123.2014.09.09.07.56.14 for ; Tue, 09 Sep 2014 07:56:15 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932715AbaIIO4K (ORCPT + 5 others); Tue, 9 Sep 2014 10:56:10 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:58401 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932447AbaIIO4G (ORCPT ); Tue, 9 Sep 2014 10:56:06 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s89Etk9X003661; Tue, 9 Sep 2014 09:55:46 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89EtkA5008899; Tue, 9 Sep 2014 09:55:46 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Tue, 9 Sep 2014 09:55:45 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s89EtaMe021075; Tue, 9 Sep 2014 09:55:43 -0500 From: Roger Quadros To: CC: , , , , , , , , , , Roger Quadros Subject: [PATCH v2 02/12] ARM: dts: DRA7: Add DCAN nodes Date: Tue, 9 Sep 2014 17:55:24 +0300 Message-ID: <1410274534-22826-3-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410274534-22826-1-git-send-email-rogerq@ti.com> References: <1410274534-22826-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The SoC supports 2 DCAN nodes. Add them. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 370009e..09d5739 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -34,6 +34,8 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + d_can0 = &dcan1; + d_can1 = &dcan2; }; timer { @@ -1267,6 +1269,34 @@ ti,irqs-skip = <10 133 139 140>; ti,irqs-safe-map = <0>; }; + + dcan1: can@481cc000 { + compatible = "bosch,d_can"; + ti,hwmods = "dcan1"; + reg = <0x4ae3c000 0x2000>, + <0x558 0x4>; /* index to RAMINIT reg within syscon */ + ti,raminit-syscon = <&dra7_ctrl_core>; + ti,raminit-start-bit = <3>; + ti,raminit-done-bit = <1>; + ti,raminit-pulse; + interrupts = ; + clocks = <&dcan1_sys_clk_mux>; + status = "disabled"; + }; + + dcan2: can@481d0000 { + compatible = "bosch,d_can"; + ti,hwmods = "dcan2"; + reg = <0x48480000 0x2000>, + <0x558 0x4>; /* index to RAMINIT reg within syscon */ + ti,raminit-syscon = <&dra7_ctrl_core>; + ti,raminit-start-bit = <5>; + ti,raminit-done-bit = <2>; + ti,raminit-pulse; + interrupts = ; + clocks = <&sys_clkin1>; + status = "disabled"; + }; }; };