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[209.132.180.67]) by mx.google.com with ESMTP id uj6si18219842pab.63.2014.09.08.07.11.30 for ; Mon, 08 Sep 2014 07:11:30 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754494AbaIHOLZ (ORCPT + 5 others); Mon, 8 Sep 2014 10:11:25 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:50120 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754423AbaIHOLX (ORCPT ); Mon, 8 Sep 2014 10:11:23 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s88EB527032601; Mon, 8 Sep 2014 09:11:05 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s88EB5FZ000411; Mon, 8 Sep 2014 09:11:05 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Mon, 8 Sep 2014 09:11:05 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s88EAi0B014173; Mon, 8 Sep 2014 09:11:02 -0500 From: Roger Quadros To: , , CC: , , , , , , , , , Roger Quadros Subject: [PATCH 05/13] ARM: dts: DRA7: Add DCAN nodes Date: Mon, 8 Sep 2014 17:10:34 +0300 Message-ID: <1410185442-907-6-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1410185442-907-1-git-send-email-rogerq@ti.com> References: <1410185442-907-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The SoC supports 2 DCAN nodes. Add them. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/dra7.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 370009e..4ce1a4f 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -34,6 +34,8 @@ serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + d_can0 = &dcan1; + d_can1 = &dcan2; }; timer { @@ -1267,6 +1269,34 @@ ti,irqs-skip = <10 133 139 140>; ti,irqs-safe-map = <0>; }; + + dcan1: d_can@481cc000 { + compatible = "bosch,d_can"; + ti,hwmods = "dcan1"; + reg = <0x4ae3c000 0x2000>, + <0x558 0x4>; /* index to RAMINIT reg within syscon */ + raminit-syscon = <&dra7_ctrl_core>; + raminit-start-bit = <3>; + raminit-done-bit = <1>; + raminit-pulse; + interrupts = ; + clocks = <&dcan1_sys_clk_mux>; + status = "disabled"; + }; + + dcan2: d_can@481d0000 { + compatible = "bosch,d_can"; + ti,hwmods = "dcan2"; + reg = <0x48480000 0x2000>, + <0x558 0x4>; /* index to RAMINIT reg within syscon */ + raminit-syscon = <&dra7_ctrl_core>; + raminit-start-bit = <5>; + raminit-done-bit = <2>; + raminit-pulse; + interrupts = ; + clocks = <&sys_clkin1>; + status = "disabled"; + }; }; };