From patchwork Mon Sep 1 18:09:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 36415 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-qg0-f69.google.com (mail-qg0-f69.google.com [209.85.192.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E4B032032B for ; Mon, 1 Sep 2014 18:10:32 +0000 (UTC) Received: by mail-qg0-f69.google.com with SMTP id a108sf19059962qge.4 for ; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=C6O00uo9urZVg4A5MpihxxODCi6inMQt0XtWfFKVQC0=; b=iC5Z699nwHW+tpFV8Aa223X87O2Uz6Gyyqk82sRGwHQANSY59pOMO+o3Ta13HpUpJd w6O+KcfZLQZGJlHpdxhZqqpHGzWsvFxzCsy3lBZlp7KPmWRPwANaur/3kRJDLTQUIqLZ Sbr/MordsKg969w8bQP6blLz3pttg6jQhXuUxEYaFziHXpVaoGP5r2Vw65W7BsUQsuks 4qCi2WHGrh19aL7b39OKMO8iKH1vQeFz0TB4+wTBi8V7Jq2Sk2f+g0ylEZ8KvxNDop/X 95P6L2TSHX+maiyq1CdHLWTFJA+9bIO4/PWFHJV6+XbwL2phUFpH4OzFNO9nq3CSdtIZ zBwA== X-Gm-Message-State: ALoCoQnBJmTECJP+D226c/v0++ZR3F18VAiqVhEXO0ZehHUT3nktIYX28y2ty1adc4xTWLBljecQ X-Received: by 10.236.15.3 with SMTP id e3mr4047889yhe.50.1409595032799; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.109.117 with SMTP id k108ls2009537qgf.3.gmail; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) X-Received: by 10.220.59.138 with SMTP id l10mr1648974vch.59.1409595032714; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id ry3si1105349vcb.27.2014.09.01.11.10.32 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 11:10:32 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id ij19so5955380vcb.3 for ; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) X-Received: by 10.221.21.201 with SMTP id qt9mr1663128vcb.39.1409595032635; Mon, 01 Sep 2014 11:10:32 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.45.67 with SMTP id uj3csp421380vcb; Mon, 1 Sep 2014 11:10:32 -0700 (PDT) X-Received: by 10.66.236.38 with SMTP id ur6mr41675807pac.49.1409595031589; Mon, 01 Sep 2014 11:10:31 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ef7si2466605pac.71.2014.09.01.11.10.31 for ; Mon, 01 Sep 2014 11:10:31 -0700 (PDT) Received-SPF: none (google.com: linux-omap-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754727AbaIASK0 (ORCPT + 5 others); Mon, 1 Sep 2014 14:10:26 -0400 Received: from comal.ext.ti.com ([198.47.26.152]:44852 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754716AbaIASKZ (ORCPT ); Mon, 1 Sep 2014 14:10:25 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s81IA6jd007398; Mon, 1 Sep 2014 13:10:06 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s81IA6Ai008583; Mon, 1 Sep 2014 13:10:06 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 1 Sep 2014 13:10:06 -0500 Received: from sokoban.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s81I9JlO012145; Mon, 1 Sep 2014 13:10:05 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 25/26] ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain Date: Mon, 1 Sep 2014 21:09:14 +0300 Message-ID: <1409594955-1476-26-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1409594955-1476-1-git-send-email-t-kristo@ti.com> References: <1409594955-1476-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This adds a generic API for reconfiguring the I/O chain. The implementation will call the SoC specific function registered during init time. The SoC specific reconfigure functions are also made static, as they don't need to be accessed outside the PRM driver itself. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/omap_hwmod.c | 5 +---- arch/arm/mach-omap2/prm.h | 2 ++ arch/arm/mach-omap2/prm3xxx.c | 3 ++- arch/arm/mach-omap2/prm3xxx.h | 8 -------- arch/arm/mach-omap2/prm44xx.c | 3 ++- arch/arm/mach-omap2/prm44xx_54xx.h | 9 --------- arch/arm/mach-omap2/prm_common.c | 16 ++++++++++++++++ 7 files changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 1de87a7..1bfc504 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -1983,10 +1983,7 @@ static void _reconfigure_io_chain(void) spin_lock_irqsave(&io_chain_lock, flags); - if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl()) - omap3xxx_prm_reconfigure_io_chain(); - else if (cpu_is_omap44xx()) - omap44xx_prm_reconfigure_io_chain(); + prm_reconfigure_io_chain(); spin_unlock_irqrestore(&io_chain_lock, flags); } diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h index 0dd8d83..7efe14c 100644 --- a/arch/arm/mach-omap2/prm.h +++ b/arch/arm/mach-omap2/prm.h @@ -157,6 +157,8 @@ extern u32 prm_read_reset_sources(void); extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx); extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); +void prm_reconfigure_io_chain(void); + #endif diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index f21fd76..1a739de 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -34,6 +34,7 @@ static void omap3xxx_prm_read_pending_irqs(unsigned long *events); static void omap3xxx_prm_ocp_barrier(void); static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); static void omap3xxx_prm_restore_irqen(u32 *saved_mask); +static void omap3xxx_prm_reconfigure_io_chain(void); static const struct omap_prcm_irq omap3_prcm_irqs[] = { OMAP_PRCM_IRQ("wkup", 0, 0), @@ -383,7 +384,7 @@ void __init omap3_prm_init_pm(bool has_uart4, bool has_iva) * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No * return value. */ -void omap3xxx_prm_reconfigure_io_chain(void) +static void omap3xxx_prm_reconfigure_io_chain(void) { int i = 0; diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index 5d993d2..321568b 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -144,14 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset); extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -#ifdef CONFIG_ARCH_OMAP3 -void omap3xxx_prm_reconfigure_io_chain(void); -#else -static inline void omap3xxx_prm_reconfigure_io_chain(void) -{ -} -#endif - extern void omap3xxx_prm_dpll3_reset(void); extern int __init omap3xxx_prm_init(void); diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index bfcc356..e7ac7e2 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -36,6 +36,7 @@ static void omap44xx_prm_read_pending_irqs(unsigned long *events); static void omap44xx_prm_ocp_barrier(void); static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask); static void omap44xx_prm_restore_irqen(u32 *saved_mask); +static void omap44xx_prm_reconfigure_io_chain(void); static const struct omap_prcm_irq omap4_prcm_irqs[] = { OMAP_PRCM_IRQ("io", 9, 1), @@ -292,7 +293,7 @@ static void omap44xx_prm_restore_irqen(u32 *saved_mask) * deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted. * No return value. XXX Are the final two steps necessary? */ -void omap44xx_prm_reconfigure_io_chain(void) +static void omap44xx_prm_reconfigure_io_chain(void) { int i = 0; s32 inst = omap4_prmst_get_prm_dev_inst(); diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index faa7411..f751251 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -38,15 +38,6 @@ extern u32 omap4_prm_vcvp_read(u8 offset); extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); -#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ - defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) -void omap44xx_prm_reconfigure_io_chain(void); -#else -static inline void omap44xx_prm_reconfigure_io_chain(void) -{ -} -#endif - extern int __init omap44xx_prm_init(void); extern u32 omap44xx_prm_get_reset_sources(void); diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index f246bb4..582ed6a 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -487,6 +487,22 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset) } /** + * prm_reconfigure_io_chain - clear latches and reconfigure I/O chain + * + * Clear any previously-latched I/O wakeup events and ensure that the + * I/O wakeup gaes are aligned with the current mux settings. + * Calls SoC specific I/O chain reconfigure function if available, + * otherwise does nothing. + */ +void prm_reconfigure_io_chain(void) +{ + if (!prcm_irq_setup || !prcm_irq_setup->reconfigure_io_chain) + return; + + prcm_irq_setup->reconfigure_io_chain(); +} + +/** * prm_register - register per-SoC low-level data with the PRM * @pld: low-level per-SoC OMAP PRM data & function pointers to register *