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(ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s5CBtEc0008910; Thu, 12 Jun 2014 06:56:09 -0500 From: Sricharan R To: , , , CC: , , , , , , , Subject: [PATCH V2 11/19] irqchip: crossbar: fix memory leak incase of invalid entry Date: Thu, 12 Jun 2014 17:23:19 +0530 Message-ID: <1402574007-13987-12-git-send-email-r.sricharan@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402574007-13987-1-git-send-email-r.sricharan@ti.com> References: <1402574007-13987-1-git-send-email-r.sricharan@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: r.sricharan@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Nishanth Menon When the provided unused skip list entry is greater than max irqs possible, we go to err3, but we fail to free register_offsets, should have returned to err4 instead which ensures that allocated register_offsets are freed as well. Signed-off-by: Nishanth Menon --- drivers/irqchip/irq-crossbar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index 42a2e62..fea3e5d 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -225,7 +225,7 @@ static int __init crossbar_of_init(struct device_node *node, if (entry > max) { pr_err("Invalid skip entry\n"); - goto err3; + goto err4; } cb->irq_map[entry] = IRQ_SKIP; }