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[209.132.180.67]) by mx.google.com with ESMTP id uu10si5973067pac.36.2014.04.29.13.20.27; Tue, 29 Apr 2014 13:20:27 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758303AbaD2UU1 (ORCPT + 9 others); Tue, 29 Apr 2014 16:20:27 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:44064 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756660AbaD2UU0 (ORCPT ); Tue, 29 Apr 2014 16:20:26 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s3TKJrVR010920; Tue, 29 Apr 2014 15:19:53 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJrw7002430; Tue, 29 Apr 2014 15:19:53 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Tue, 29 Apr 2014 15:19:53 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s3TKJrRU030688; Tue, 29 Apr 2014 15:19:53 -0500 Received: from localhost (j-172-22-136-12.vpn.ti.com [172.22.136.12]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id s3TKJqt25387; Tue, 29 Apr 2014 15:19:53 -0500 (CDT) From: Dan Murphy To: , , , CC: , , , Dan Murphy Subject: [RFC 02/11] drivers: reset: dra7: Add reset data for dra7xx Date: Tue, 29 Apr 2014 15:19:41 -0500 Message-ID: <1398802790-29287-3-git-send-email-dmurphy@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398802790-29287-1-git-send-email-dmurphy@ti.com> References: <1398802790-29287-1-git-send-email-dmurphy@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: dmurphy@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add the reset register data for the dra7xx SoC. Include the dt-bindings header to properly index the right reset node. Signed-off-by: Dan Murphy --- drivers/reset/ti/Makefile | 1 + drivers/reset/ti/reset-ti-data.h | 1 + drivers/reset/ti/reset-ti-dra7xx.c | 61 ++++++++++++++++++++++++++++++++++++ drivers/reset/ti/reset-ti.c | 3 ++ 4 files changed, 66 insertions(+) create mode 100644 drivers/reset/ti/reset-ti-dra7xx.c diff --git a/drivers/reset/ti/Makefile b/drivers/reset/ti/Makefile index 55ab3f5..622eb3b 100644 --- a/drivers/reset/ti/Makefile +++ b/drivers/reset/ti/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_RESET_TI) += reset-ti.o +obj-$(CONFIG_SOC_DRA7XX) += reset-ti-dra7xx.o diff --git a/drivers/reset/ti/reset-ti-data.h b/drivers/reset/ti/reset-ti-data.h index 6afdf37..5812ed5 100644 --- a/drivers/reset/ti/reset-ti-data.h +++ b/drivers/reset/ti/reset-ti-data.h @@ -55,4 +55,5 @@ struct ti_reset_data { u8 nr_resets; }; +extern struct ti_reset_data dra7_reset_data; #endif diff --git a/drivers/reset/ti/reset-ti-dra7xx.c b/drivers/reset/ti/reset-ti-dra7xx.c new file mode 100644 index 0000000..764f83e --- /dev/null +++ b/drivers/reset/ti/reset-ti-dra7xx.c @@ -0,0 +1,61 @@ +/* + * dra7xx reset data for PRCM Module + * + * Copyright 2014 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "reset-ti-data.h" + +static struct ti_reset_reg_data dra7_reset_reg_data[] = { + { + .rstctrl_offs = 0x1D00, + .rstctrl_bit = 0x0, + .rstst_offs = 0x1D04, + .rstst_bit = 0x0, + }, + { + .rstctrl_offs = 0x410, + .rstctrl_bit = 0x0, + .rstst_offs = 0x414, + .rstst_bit = 0x0, + }, + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x0, + .rstst_offs = 0x514, + .rstst_bit = 0x0, + }, /* IPU_CPU0 */ + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x1, + .rstst_offs = 0x514, + .rstst_bit = 0x1, + }, /* IPU_CPU1 */ + { + .rstctrl_offs = 0x510, + .rstctrl_bit = 0x2, + .rstst_offs = 0x514, + .rstst_bit = 0x2, + }, /* IPU_MMU_CACHE */ + { + .rstctrl_offs = 0xf10, + .rstctrl_bit = 0, + .rstst_offs = 0xf14, + .rstst_bit = 0, + }, + { + .rstctrl_offs = 0x1310, + .rstctrl_bit = 0, + .rstst_offs = 0x1314, + .rstst_bit = 0, + }, +}; + +struct ti_reset_data dra7_reset_data = { + .reg_data = dra7_reset_reg_data, + .nr_resets = ARRAY_SIZE(dra7_reset_reg_data), +}; diff --git a/drivers/reset/ti/reset-ti.c b/drivers/reset/ti/reset-ti.c index 1d38069..486b77c 100644 --- a/drivers/reset/ti/reset-ti.c +++ b/drivers/reset/ti/reset-ti.c @@ -132,6 +132,9 @@ static struct reset_control_ops ti_reset_ops = { }; static const struct of_device_id ti_reset_of_match[] = { +#ifdef CONFIG_SOC_DRA7XX + { .compatible = "ti,dra7-resets", .data = &dra7_reset_data,}, +#endif {}, };