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[209.132.180.67]) by mx.google.com with ESMTP id k1si9354231pao.142.2014.03.31.08.18.13; Mon, 31 Mar 2014 08:18:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753858AbaCaPSM (ORCPT + 5 others); Mon, 31 Mar 2014 11:18:12 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:54697 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753829AbaCaPSK (ORCPT ); Mon, 31 Mar 2014 11:18:10 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2VFHbwB028657; Mon, 31 Mar 2014 10:17:37 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2VFHbJK023434; Mon, 31 Mar 2014 10:17:37 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 31 Mar 2014 10:17:37 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2VFGm4B013169; Mon, 31 Mar 2014 10:17:36 -0500 From: Tero Kristo To: , , CC: Subject: [PATCH 24/55] ARM: OMAP3: CM: move cm3xxx.h header to public location Date: Mon, 31 Mar 2014 18:16:03 +0300 Message-ID: <1396278994-12624-25-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396278994-12624-1-git-send-email-t-kristo@ti.com> References: <1396278994-12624-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.180 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This file needs to be accessible from the PRCM core and mach-omap2 board support code. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/cm3xxx.c | 2 +- arch/arm/mach-omap2/cm3xxx.h | 66 +---------------------------- arch/arm/mach-omap2/cm_common.c | 2 +- arch/arm/mach-omap2/prm3xxx.c | 2 +- include/linux/power/omap/cm3xxx.h | 82 +++++++++++++++++++++++++++++++++++++ 5 files changed, 86 insertions(+), 68 deletions(-) create mode 100644 include/linux/power/omap/cm3xxx.h diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c index 859c2fd..cbba617 100644 --- a/arch/arm/mach-omap2/cm3xxx.c +++ b/arch/arm/mach-omap2/cm3xxx.c @@ -21,7 +21,7 @@ #include "prm2xxx_3xxx.h" #include "cm.h" #include "cm2xxx_3xxx_private.h" -#include "cm3xxx.h" +#include #include "clockdomain.h" #define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0 diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h index 0301557..9c2047f 100644 --- a/arch/arm/mach-omap2/cm3xxx.h +++ b/arch/arm/mach-omap2/cm3xxx.h @@ -18,73 +18,9 @@ #include "prcm-common.h" #include "cm2xxx_3xxx.h" +#include #define OMAP34XX_CM_REGADDR(module, reg) \ OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg)) - -/* - * OMAP3-specific global CM registers - * Use cm_{read,write}_reg() with these registers. - * These registers appear once per CM module. - */ - -#define OMAP3430_CM_SYSCONFIG 0x0010 -#define OMAP3430_CM_POLCTRL 0x009c - -#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 - -/* - * Module specific CM register offsets from CM_BASE + domain offset - * Use cm_{read,write}_mod_reg() with these registers. - * These register offsets generally appear in more than one PRCM submodule. - */ - -/* OMAP3-specific register offsets */ - -#define OMAP3430_CM_CLKEN_PLL 0x0004 -#define OMAP3430ES2_CM_CLKEN2 0x0004 -#define OMAP3430ES2_CM_FCLKEN3 0x0008 -#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 -#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 -#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 -#define OMAP3430_CM_CLKSEL1 CM_CLKSEL -#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL -#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 -#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 -#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL -#define OMAP3430_CM_CLKSTST 0x004c -#define OMAP3430ES2_CM_CLKSEL4 0x004c -#define OMAP3430ES2_CM_CLKSEL5 0x0050 -#define OMAP3430_CM_CLKSEL2_EMU 0x0050 -#define OMAP3430_CM_CLKSEL3_EMU 0x0054 - - -/* CM_IDLEST bit field values to indicate deasserted IdleReq */ - -#define OMAP34XX_CM_IDLEST_VAL 1 - - -#ifndef __ASSEMBLER__ - -extern void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); -extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); - -extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); -extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, - u8 idlest_shift); - -extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, - s16 *prcm_inst, u8 *idlest_reg_id); - -extern void omap3_cm_save_context(void); -extern void omap3_cm_restore_context(void); -extern void omap3_cm_save_scratchpad_contents(u32 *ptr); - -extern int __init omap3xxx_cm_init(void); - -#endif - #endif diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c index 9a53eb5..f8f9343 100644 --- a/arch/arm/mach-omap2/cm_common.c +++ b/arch/arm/mach-omap2/cm_common.c @@ -17,7 +17,7 @@ #include #include -#include "cm3xxx.h" +#include #include "cm44xx.h" /* diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index 852bc4d..4700605 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -23,7 +23,7 @@ #include "prm3xxx.h" #include "prm2xxx_3xxx_private.h" #include "cm2xxx_3xxx_private.h" -#include "cm3xxx.h" +#include #define OMAP3430_GLOBAL_COLD_RST_MASK (1 << 0) #define OMAP3430_GLOBAL_COLD_RST_SHIFT 0 diff --git a/include/linux/power/omap/cm3xxx.h b/include/linux/power/omap/cm3xxx.h new file mode 100644 index 0000000..ef3204b --- /dev/null +++ b/include/linux/power/omap/cm3xxx.h @@ -0,0 +1,82 @@ +/* + * OMAP2/3 Clock Management (CM) register definitions + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + * Copyright (C) 2007-2010 Nokia Corporation + * Paul Walmsley + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The CM hardware modules on the OMAP2/3 are quite similar to each + * other. The CM modules/instances on OMAP4 are quite different, so + * they are handled in a separate file. + */ +#ifndef __LINUX_POWER_OMAP_CM3XXX_H +#define __LINUX_POWER_OMAP_CM3XXX_H + +/* + * OMAP3-specific global CM registers + * Use cm_{read,write}_reg() with these registers. + * These registers appear once per CM module. + */ + +#define OMAP3430_CM_SYSCONFIG 0x0010 +#define OMAP3430_CM_POLCTRL 0x009c + +#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070 + +/* + * Module specific CM register offsets from CM_BASE + domain offset + * Use cm_{read,write}_mod_reg() with these registers. + * These register offsets generally appear in more than one PRCM submodule. + */ + +/* OMAP3-specific register offsets */ + +#define OMAP3430_CM_CLKEN_PLL 0x0004 +#define OMAP3430ES2_CM_CLKEN2 0x0004 +#define OMAP3430ES2_CM_FCLKEN3 0x0008 +#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2 +#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2 +#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2 +#define OMAP3430_CM_CLKSEL1 CM_CLKSEL +#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL +#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 +#define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 +#define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL +#define OMAP3430_CM_CLKSTST 0x004c +#define OMAP3430ES2_CM_CLKSEL4 0x004c +#define OMAP3430ES2_CM_CLKSEL5 0x0050 +#define OMAP3430_CM_CLKSEL2_EMU 0x0050 +#define OMAP3430_CM_CLKSEL3_EMU 0x0054 + + +/* CM_IDLEST bit field values to indicate deasserted IdleReq */ + +#define OMAP34XX_CM_IDLEST_VAL 1 + +#ifndef __ASSEMBLER__ + +void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask); +void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask); +void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask); +void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask); + +bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask); +int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, + u8 idlest_shift); + +int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, + s16 *prcm_inst, u8 *idlest_reg_id); + +void omap3_cm_save_context(void); +void omap3_cm_restore_context(void); +void omap3_cm_save_scratchpad_contents(u32 *ptr); + +int __init omap3xxx_cm_init(void); + +#endif + +#endif