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[209.132.180.67]) by mx.google.com with ESMTP id ki1si4808768pbc.25.2014.02.27.06.22.35; Thu, 27 Feb 2014 06:22:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752918AbaB0OUI (ORCPT + 26 others); Thu, 27 Feb 2014 09:20:08 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:49652 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752563AbaB0OTU (ORCPT ); Thu, 27 Feb 2014 09:19:20 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s1REIwlK006250; Thu, 27 Feb 2014 08:18:58 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1REIwdl025976; Thu, 27 Feb 2014 08:18:58 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Thu, 27 Feb 2014 08:18:58 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s1REIXBj006792; Thu, 27 Feb 2014 08:18:56 -0600 From: Roger Quadros To: , , CC: , , , , , , Roger Quadros Subject: [PATCH v9 7/9] ARM: OMAP2+: Remove legacy_init_ehci_clk() Date: Thu, 27 Feb 2014 16:18:29 +0200 Message-ID: <1393510711-4697-8-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1393510711-4697-1-git-send-email-rogerq@ti.com> References: <1393510711-4697-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The necessary clock phandle for the EHCI clock is now provided via device tree so we no longer need this legacy method. Update the omap4-panda and omap5-uevm board DTS to provide the necessary EHCI PHY clock information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap4-panda-common.dtsi | 8 ++------ arch/arm/boot/dts/omap5-uevm.dts | 8 ++------ arch/arm/mach-omap2/pdata-quirks.c | 16 ---------------- 3 files changed, 4 insertions(+), 28 deletions(-) diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 88c6a05..50b72966 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -83,12 +83,8 @@ compatible = "usb-nop-xceiv"; reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */ vcc-supply = <&hsusb1_power>; - /** - * FIXME: - * put the right clock phandle here when available - * clocks = <&auxclk3>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk3_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; }; diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 002fa70..3b99ec2 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -31,12 +31,8 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ - /** - * FIXME - * Put the right clock phandle here when available - * clocks = <&auxclk1>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk1_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; }; diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 3d5b24d..f1ecd86 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -31,20 +31,6 @@ struct pdata_init { struct of_dev_auxdata omap_auxdata_lookup[]; static struct twl4030_gpio_platform_data twl_gpio_auxdata; -/* - * Create alias for USB host PHY clock. - * Remove this when clock phandle can be provided via DT - */ -static void __init __used legacy_init_ehci_clk(char *clkname) -{ - int ret; - - ret = clk_add_alias("main_clk", NULL, clkname, NULL); - if (ret) - pr_err("%s:Failed to add main_clk alias to %s :%d\n", - __func__, clkname, ret); -} - #if IS_ENABLED(CONFIG_WL12XX) static struct wl12xx_platform_data wl12xx __initdata; @@ -182,7 +168,6 @@ static void __init omap4_sdp_legacy_init(void) static void __init omap4_panda_legacy_init(void) { omap4_panda_display_init_of(); - legacy_init_ehci_clk("auxclk3_ck"); legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 53); } #endif @@ -190,7 +175,6 @@ static void __init omap4_panda_legacy_init(void) #ifdef CONFIG_SOC_OMAP5 static void __init omap5_uevm_legacy_init(void) { - legacy_init_ehci_clk("auxclk1_ck"); } #endif