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[209.132.180.67]) by mx.google.com with ESMTP id i8si1676605pav.45.2014.01.20.06.14.03; Mon, 20 Jan 2014 06:14:03 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754062AbaATON5 (ORCPT + 26 others); Mon, 20 Jan 2014 09:13:57 -0500 Received: from devils.ext.ti.com ([198.47.26.153]:44468 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753966AbaATOMu (ORCPT ); Mon, 20 Jan 2014 09:12:50 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s0KECF3x006417; Mon, 20 Jan 2014 08:12:15 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s0KECFKn005281; Mon, 20 Jan 2014 08:12:15 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.2.342.3; Mon, 20 Jan 2014 08:12:14 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s0KEBZPR005336; Mon, 20 Jan 2014 08:12:11 -0600 From: Roger Quadros To: , CC: , , , , , , , , , , , Roger Quadros Subject: [PATCH v6 09/10] ARM: dts: omap5-uevm: Provide USB PHY clock Date: Mon, 20 Jan 2014 16:11:30 +0200 Message-ID: <1390227091-4523-10-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1390227091-4523-1-git-send-email-rogerq@ti.com> References: <1390227091-4523-1-git-send-email-rogerq@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.49 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The HS USB 2 PHY gets its clock from AUXCLK1. Provide this information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap5-uevm.dts | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 002fa70..3b99ec2 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -31,12 +31,8 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ - /** - * FIXME - * Put the right clock phandle here when available - * clocks = <&auxclk1>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk1_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; };