From patchwork Thu Jan 9 14:00:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 23039 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E1037216DD for ; Thu, 9 Jan 2014 14:04:13 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id m1sf11680583oag.4 for ; Thu, 09 Jan 2014 06:04:13 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe:content-type; bh=EYaAb4Vb+M2zZLj4F/gll6/GbKjXiqMrIfu6kbhxL9k=; b=FmyTqk0+cJW6rDwoLZavrKslp5Wy/hxXsVESeVt3iTxxWLcQ1GpjlI/p/4rHRPWk24 L4CLRPt2rDio68At4qwpXc0yR/lWkmbw69eQTqD5F3C9+ckAi7RP9OSZHGMjwxtxDIbz SGxHXCGzeISWT+4HKdklorSMf3xZ4cDh4FDrkz0RZKIxawAxLUsY7rZthsM3tlJi77D1 0MiAFloGUSYQ0AjoxLAXWAkVXufPlglH5jhvLk7ybJXKzgrcT+ggbLNshwdBmZLw/tLF cCg1f/OdyxfD3vGDlZjHINMxQMR8W/VRG6KvPI/RobjDS62VCdF5/iCyCzyWpzoDAPud MSpg== X-Gm-Message-State: ALoCoQlUyeG0Up/AWIPoDbCtBIZtDedlFW/TBbOIUY7DXT3sA6jpTqyXGkj7Z1NFLqEuK+ssMmis X-Received: by 10.50.154.73 with SMTP id vm9mr1595480igb.2.1389276252971; Thu, 09 Jan 2014 06:04:12 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.24.145 with SMTP id u17ls1079474qef.42.gmail; Thu, 09 Jan 2014 06:04:12 -0800 (PST) X-Received: by 10.58.90.230 with SMTP id bz6mr1271662veb.21.1389276252863; Thu, 09 Jan 2014 06:04:12 -0800 (PST) Received: from mail-vb0-f42.google.com (mail-vb0-f42.google.com [209.85.212.42]) by mx.google.com with ESMTPS id gq3si2883970vdc.80.2014.01.09.06.04.12 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 09 Jan 2014 06:04:12 -0800 (PST) Received-SPF: neutral (google.com: 209.85.212.42 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.212.42; Received: by mail-vb0-f42.google.com with SMTP id w5so2232980vbf.15 for ; Thu, 09 Jan 2014 06:04:12 -0800 (PST) X-Received: by 10.52.76.105 with SMTP id j9mr1596745vdw.52.1389276252720; Thu, 09 Jan 2014 06:04:12 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.59.13.131 with SMTP id ey3csp14416ved; Thu, 9 Jan 2014 06:04:11 -0800 (PST) X-Received: by 10.42.232.206 with SMTP id jv14mr2463878icb.52.1389276250836; Thu, 09 Jan 2014 06:04:10 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ot3si4011840pac.282.2014.01.09.06.04.10; Thu, 09 Jan 2014 06:04:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756390AbaAIOEC (ORCPT + 5 others); Thu, 9 Jan 2014 09:04:02 -0500 Received: from comal.ext.ti.com ([198.47.26.152]:37757 "EHLO comal.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752512AbaAIODb (ORCPT ); Thu, 9 Jan 2014 09:03:31 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id s09E2hki018693; Thu, 9 Jan 2014 08:02:43 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s09E2hhB028872; Thu, 9 Jan 2014 08:02:43 -0600 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Thu, 9 Jan 2014 08:02:43 -0600 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s09E12WY030058; Thu, 9 Jan 2014 08:02:41 -0600 From: Tero Kristo To: , , , , , , CC: , Subject: [PATCHv13 30/40] ARM: OMAP2+: clock: add support for indexed memmaps Date: Thu, 9 Jan 2014 16:00:41 +0200 Message-ID: <1389276051-1326-31-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1389276051-1326-1-git-send-email-t-kristo@ti.com> References: <1389276051-1326-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-omap-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: t-kristo@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.42 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Using indexed memmaps is required for isolating the actual memory access from the clock code. Now, the driver providing the support for the clock IP block provides the low level routines for reading/writing clock registers also. Signed-off-by: Tero Kristo --- arch/arm/mach-omap2/clock.c | 26 +++++++++++++++++++++++++- arch/arm/mach-omap2/clock.h | 5 +++++ 2 files changed, 30 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 238be3f..be53bb2 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -26,7 +26,6 @@ #include #include - #include #include "soc.h" @@ -56,6 +55,31 @@ u16 cpu_mask; static bool clkdm_control = true; static LIST_HEAD(clk_hw_omap_clocks); +void __iomem *clk_memmaps[CLK_MAX_MEMMAPS]; + +void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg) +{ + if (clk->flags & MEMMAP_ADDRESSING) { + struct clk_omap_reg *r = (struct clk_omap_reg *)® + writel_relaxed(val, clk_memmaps[r->index] + r->offset); + } else { + writel_relaxed(val, reg); + } +} + +u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg) +{ + u32 val; + + if (clk->flags & MEMMAP_ADDRESSING) { + struct clk_omap_reg *r = (struct clk_omap_reg *)® + val = readl_relaxed(clk_memmaps[r->index] + r->offset); + } else { + val = readl_relaxed(reg); + } + + return val; +} /* * Used for clocks that have the same value as the parent clock, diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index cbe5ff7..bda767a 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -254,6 +254,9 @@ void omap2_clk_print_new_rates(const char *hfclkin_ck_name, const char *core_ck_name, const char *mpu_ck_name); +u32 omap2_clk_readl(struct clk_hw_omap *clk, void __iomem *reg); +void omap2_clk_writel(u32 val, struct clk_hw_omap *clk, void __iomem *reg); + extern u16 cpu_mask; extern const struct clkops clkops_omap2_dflt_wait; @@ -288,6 +291,8 @@ extern const struct clksel_rate div_1_3_rates[]; extern const struct clksel_rate div_1_4_rates[]; extern const struct clksel_rate div31_1to31_rates[]; +extern void __iomem *clk_memmaps[]; + extern int am33xx_clk_init(void); extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);