From patchwork Thu Nov 8 01:12:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 12738 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2E2C923E37 for ; Thu, 8 Nov 2012 01:13:46 +0000 (UTC) Received: from mail-ia0-f180.google.com (mail-ia0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id D3957A19298 for ; Thu, 8 Nov 2012 01:13:45 +0000 (UTC) Received: by mail-ia0-f180.google.com with SMTP id f6so1520036iag.11 for ; Wed, 07 Nov 2012 17:13:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=e1AMV/lWUTS4piN349kguO/TngIakjZurMvuG8iBbZs=; b=cYhy/NhtcFhMtRJIGlHvoOYer6MdbwkIBTmhV7aXk/USBJx0/XBofI1JT52IaIELnN IrGZWBTkzhHRvMYGALf9YQZyudogKNotUk5heSBH92cKw56hBasJkvvLcD3xjFsCBpRk QBx0cBkP3L4/m/AWDzSUGnfhDbGdH7Mhgxu/U/J12gd+58/Z11dR6ZVigTaJBiJBHsss JxQZ6RfZkl1pEwkf62KY0aZwMblGNNoeSlus31jPxkQZ2WTC0y8gj+NE9oDBvF0wgUvH TpDYGx0tNLBBX4oWDx9PX9tWwEDSqdZDjeVe14+Z4YZUzf06/ktTdkuS3G7FhaIHOiaX vs6Q== Received: by 10.50.173.34 with SMTP id bh2mr6443249igc.70.1352337225610; Wed, 07 Nov 2012 17:13:45 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp304364igt; Wed, 7 Nov 2012 17:13:45 -0800 (PST) Received: by 10.182.172.74 with SMTP id ba10mr4327308obc.83.1352337225198; Wed, 07 Nov 2012 17:13:45 -0800 (PST) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com. [192.94.94.40]) by mx.google.com with ESMTPS id ym2si22940750obb.69.2012.11.07.17.13.44 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Nov 2012 17:13:45 -0800 (PST) Received-SPF: pass (google.com: domain of mturquette@ti.com designates 192.94.94.40 as permitted sender) client-ip=192.94.94.40; Authentication-Results: mx.google.com; spf=pass (google.com: domain of mturquette@ti.com designates 192.94.94.40 as permitted sender) smtp.mail=mturquette@ti.com Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA81DicK019081; Wed, 7 Nov 2012 19:13:44 -0600 Received: from DLEE74.ent.ti.com (dlee74.ent.ti.com [157.170.170.8]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA81DiD9003872; Wed, 7 Nov 2012 19:13:44 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by DLEE74.ent.ti.com (157.170.170.8) with Microsoft SMTP Server id 14.1.323.3; Wed, 7 Nov 2012 19:13:44 -0600 Received: from nucleus.nsc.com (nucleus.nsc.com [10.188.36.112]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA81DPLk015450; Wed, 7 Nov 2012 19:13:43 -0600 From: Mike Turquette To: CC: , , , , Mike Turquette Subject: [PATCH 20/26] ARM: omap3: clock: Cleanup !CONFIG_COMMON_CLK parts Date: Wed, 7 Nov 2012 17:12:55 -0800 Message-ID: <1352337181-29427-21-git-send-email-mturquette@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1352337181-29427-1-git-send-email-mturquette@ti.com> References: <1352337181-29427-1-git-send-email-mturquette@ti.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQk6wGFbzvjCP+9u/O9TCX5k1Nbx/Q3xBZiIEbsiB6L6iXaPUBZq4Xb1XTp7SRir4ABRaSJV From: Rajendra Nayak Clean all #ifdef's added to OMAP3 clock code to make it COMMON clk ready, not that CONFIG_COMMON_CLK is enabled. Signed-off-by: Rajendra Nayak Signed-off-by: Mike Turquette --- arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 13 ------ arch/arm/mach-omap2/clock.h | 16 -------- arch/arm/mach-omap2/clock34xx.c | 68 +------------------------------- arch/arm/mach-omap2/clock3517.c | 35 +--------------- arch/arm/mach-omap2/clock36xx.c | 19 --------- arch/arm/mach-omap2/clock36xx.h | 4 -- arch/arm/mach-omap2/clock3xxx.c | 8 ---- arch/arm/mach-omap2/clock3xxx.h | 5 --- 8 files changed, 3 insertions(+), 165 deletions(-) diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index aeaaa87..8e48c6d 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -45,15 +45,10 @@ * Program the DPLL M2 divider with the rounded target rate. Returns * -EINVAL upon error, or 0 upon success. */ -#ifdef CONFIG_COMMON_CLK int omap3_core_dpll_m2_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_hw_omap *clk = to_clk_hw_omap(hw); -#else -int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) -{ -#endif u32 new_div = 0; u32 unlock_dll = 0; u32 c; @@ -71,11 +66,7 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; sdrcrate = __clk_get_rate(sdrc_ick_p); -#ifdef CONFIG_COMMON_CLK clkrate = __clk_get_rate(hw->clk); -#else - clkrate = __clk_get_rate(clk); -#endif if (rate > clkrate) sdrcrate <<= ((rate / clkrate) >> 1); else @@ -124,10 +115,6 @@ int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla, sdrc_cs0->actim_ctrlb, sdrc_cs0->mr, 0, 0, 0, 0); -#ifndef CONFIG_COMMON_CLK - clk->rate = rate; -#endif - return 0; } diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 6a72ab2..a3e9067 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -586,13 +586,8 @@ int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent); #endif /* clkt_iclk.c public functions */ -#ifdef CONFIG_COMMON_CLK extern void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk); extern void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk); -#else -extern void omap2_clkt_iclk_allow_idle(struct clk *clk); -extern void omap2_clkt_iclk_deny_idle(struct clk *clk); -#endif #ifdef CONFIG_COMMON_CLK u8 omap2_init_dpll_parent(struct clk_hw *hw); @@ -671,7 +666,6 @@ extern const struct clksel_rate gfx_l3_rates[]; extern const struct clksel_rate dsp_ick_rates[]; extern struct clk dummy_ck; -#ifdef CONFIG_COMMON_CLK extern const struct clk_hw_omap_ops clkhwops_omap3_dpll; extern const struct clk_hw_omap_ops clkhwops_iclk_wait; extern const struct clk_hw_omap_ops clkhwops_wait; @@ -689,16 +683,6 @@ extern const struct clk_hw_omap_ops clkhwops_apll54; extern const struct clk_hw_omap_ops clkhwops_apll96; extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll; extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait; -#else -extern const struct clkops clkops_omap2_iclk_dflt_wait; -extern const struct clkops clkops_omap2_iclk_dflt; -extern const struct clkops clkops_omap2_iclk_idle_only; -extern const struct clkops clkops_omap2_mdmclk_dflt_wait; -extern const struct clkops clkops_omap2xxx_dpll_ops; -extern const struct clkops clkops_omap3_noncore_dpll_ops; -extern const struct clkops clkops_omap3_core_dpll_ops; -extern const struct clkops clkops_omap4_dpllmx_ops; -#endif /* CONFIG_COMMON_CLK */ /* clksel_rate blocks shared between OMAP44xx and AM33xx */ extern const struct clksel_rate div_1_0_rates[]; diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index b398a46..4596468 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -37,11 +37,7 @@ * from the CM_{I,F}CLKEN bit. Pass back the correct info via * @idlest_reg and @idlest_bit. No return value. */ -#ifdef CONFIG_COMMON_CLK static void omap3430es2_clk_ssi_find_idlest(struct clk_hw_omap *clk, -#else -static void omap3430es2_clk_ssi_find_idlest(struct clk *clk, -#endif void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) @@ -53,7 +49,6 @@ static void omap3430es2_clk_ssi_find_idlest(struct clk *clk, *idlest_bit = OMAP3430ES2_ST_SSI_IDLE_SHIFT; *idlest_val = OMAP34XX_CM_IDLEST_VAL; } -#ifdef CONFIG_COMMON_CLK const struct clk_hw_omap_ops clkhwops_omap3430es2_ssi_wait = { .find_idlest = omap3430es2_clk_ssi_find_idlest, .find_companion = omap2_clk_dflt_find_companion, @@ -65,23 +60,6 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait = { .find_idlest = omap3430es2_clk_ssi_find_idlest, .find_companion = omap2_clk_dflt_find_companion, }; -#else -const struct clkops clkops_omap3430es2_ssi_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_ssi_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, -}; - -const struct clkops clkops_omap3430es2_iclk_ssi_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_ssi_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, - .allow_idle = omap2_clkt_iclk_allow_idle, - .deny_idle = omap2_clkt_iclk_deny_idle, -}; -#endif /** * omap3430es2_clk_dss_usbhost_find_idlest - CM_IDLEST info for DSS, USBHOST @@ -97,11 +75,7 @@ const struct clkops clkops_omap3430es2_iclk_ssi_wait = { * default find_idlest code assumes that they are at the same * position.) No return value. */ -#ifdef CONFIG_COMMON_CLK static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk_hw_omap *clk, -#else -static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk, -#endif void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) @@ -114,7 +88,7 @@ static void omap3430es2_clk_dss_usbhost_find_idlest(struct clk *clk, *idlest_bit = OMAP3430ES2_ST_DSS_IDLE_SHIFT; *idlest_val = OMAP34XX_CM_IDLEST_VAL; } -#ifdef CONFIG_COMMON_CLK + const struct clk_hw_omap_ops clkhwops_omap3430es2_dss_usbhost_wait = { .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, .find_companion = omap2_clk_dflt_find_companion, @@ -126,23 +100,6 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait = { .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, .find_companion = omap2_clk_dflt_find_companion, }; -#else -const struct clkops clkops_omap3430es2_dss_usbhost_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, -}; - -const struct clkops clkops_omap3430es2_iclk_dss_usbhost_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_dss_usbhost_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, - .allow_idle = omap2_clkt_iclk_allow_idle, - .deny_idle = omap2_clkt_iclk_deny_idle, -}; -#endif /** * omap3430es2_clk_hsotgusb_find_idlest - return CM_IDLEST info for HSOTGUSB @@ -155,11 +112,7 @@ const struct clkops clkops_omap3430es2_iclk_dss_usbhost_wait = { * shift from the CM_{I,F}CLKEN bit. Pass back the correct info via * @idlest_reg and @idlest_bit. No return value. */ -#ifdef CONFIG_COMMON_CLK static void omap3430es2_clk_hsotgusb_find_idlest(struct clk_hw_omap *clk, -#else -static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk, -#endif void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) @@ -171,7 +124,7 @@ static void omap3430es2_clk_hsotgusb_find_idlest(struct clk *clk, *idlest_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT; *idlest_val = OMAP34XX_CM_IDLEST_VAL; } -#ifdef CONFIG_COMMON_CLK + const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait = { .allow_idle = omap2_clkt_iclk_allow_idle, .deny_idle = omap2_clkt_iclk_deny_idle, @@ -183,20 +136,3 @@ const struct clk_hw_omap_ops clkhwops_omap3430es2_hsotgusb_wait = { .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, .find_companion = omap2_clk_dflt_find_companion, }; -#else -const struct clkops clkops_omap3430es2_hsotgusb_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, -}; - -const struct clkops clkops_omap3430es2_iclk_hsotgusb_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = omap3430es2_clk_hsotgusb_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, - .allow_idle = omap2_clkt_iclk_allow_idle, - .deny_idle = omap2_clkt_iclk_deny_idle, -}; -#endif diff --git a/arch/arm/mach-omap2/clock3517.c b/arch/arm/mach-omap2/clock3517.c index 467d8bc..4d79ae2 100644 --- a/arch/arm/mach-omap2/clock3517.c +++ b/arch/arm/mach-omap2/clock3517.c @@ -47,11 +47,7 @@ * in the enable register itsel at a bit offset of 4 from the enable * bit. A value of 1 indicates that clock is enabled. */ -#ifdef CONFIG_COMMON_CLK static void am35xx_clk_find_idlest(struct clk_hw_omap *clk, -#else -static void am35xx_clk_find_idlest(struct clk *clk, -#endif void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) @@ -75,13 +71,8 @@ static void am35xx_clk_find_idlest(struct clk *clk, * associate this type of code with per-module data structures to * avoid this issue, and remove the casts. No return value. */ -#ifdef CONFIG_COMMON_CLK static void am35xx_clk_find_companion(struct clk_hw_omap *clk, void __iomem **other_reg, -#else -static void am35xx_clk_find_companion(struct clk *clk, - void __iomem **other_reg, -#endif u8 *other_bit) { *other_reg = (__force void __iomem *)(clk->enable_reg); @@ -90,19 +81,10 @@ static void am35xx_clk_find_companion(struct clk *clk, else *other_bit = clk->enable_bit - AM35XX_IPSS_ICK_FCK_OFFSET; } -#ifdef CONFIG_COMMON_CLK const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait = { .find_idlest = am35xx_clk_find_idlest, .find_companion = am35xx_clk_find_companion, }; -#else -const struct clkops clkops_am35xx_ipss_module_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = am35xx_clk_find_idlest, - .find_companion = am35xx_clk_find_companion, -}; -#endif /** * am35xx_clk_ipss_find_idlest - return CM_IDLEST info for IPSS @@ -115,11 +97,7 @@ const struct clkops clkops_am35xx_ipss_module_wait = { * CM_{I,F}CLKEN bit. Pass back the correct info via @idlest_reg * and @idlest_bit. No return value. */ -#ifdef CONFIG_COMMON_CLK static void am35xx_clk_ipss_find_idlest(struct clk_hw_omap *clk, -#else -static void am35xx_clk_ipss_find_idlest(struct clk *clk, -#endif void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val) @@ -131,21 +109,10 @@ static void am35xx_clk_ipss_find_idlest(struct clk *clk, *idlest_bit = AM35XX_ST_IPSS_SHIFT; *idlest_val = OMAP34XX_CM_IDLEST_VAL; } -#ifdef CONFIG_COMMON_CLK + const struct clk_hw_omap_ops clkhwops_am35xx_ipss_wait = { .allow_idle = omap2_clkt_iclk_allow_idle, .deny_idle = omap2_clkt_iclk_deny_idle, .find_idlest = am35xx_clk_ipss_find_idlest, .find_companion = omap2_clk_dflt_find_companion, }; -#else -const struct clkops clkops_am35xx_ipss_wait = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, - .find_idlest = am35xx_clk_ipss_find_idlest, - .find_companion = omap2_clk_dflt_find_companion, - .allow_idle = omap2_clkt_iclk_allow_idle, - .deny_idle = omap2_clkt_iclk_deny_idle, -}; -#endif - diff --git a/arch/arm/mach-omap2/clock36xx.c b/arch/arm/mach-omap2/clock36xx.c index 9f50e97..8f3bf4e 100644 --- a/arch/arm/mach-omap2/clock36xx.c +++ b/arch/arm/mach-omap2/clock36xx.c @@ -37,28 +37,18 @@ * (Any other value different from the Read value) to the * corresponding CM_CLKSEL register will refresh the dividers. */ -#ifdef CONFIG_COMMON_CLK int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *clk) { struct clk_hw_omap *parent; struct clk_hw *parent_hw; -#else -static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk) -{ - struct clk *parent; -#endif u32 dummy_v, orig_v, clksel_shift; int ret; /* Clear PWRDN bit of HSDIVIDER */ ret = omap2_dflt_clk_enable(clk); -#ifdef CONFIG_COMMON_CLK parent_hw = __clk_get_hw(__clk_get_parent(clk->clk)); parent = to_clk_hw_omap(parent_hw); -#else - parent = clk->parent; -#endif /* Restore the dividers */ if (!ret) { @@ -76,12 +66,3 @@ static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk) return ret; } - -#ifndef CONFIG_COMMON_CLK -const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = { - .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore, - .disable = omap2_dflt_clk_disable, - .find_companion = omap2_clk_dflt_find_companion, - .find_idlest = omap2_clk_dflt_find_idlest, -}; -#endif diff --git a/arch/arm/mach-omap2/clock36xx.h b/arch/arm/mach-omap2/clock36xx.h index e6a748e..945bb7f 100644 --- a/arch/arm/mach-omap2/clock36xx.h +++ b/arch/arm/mach-omap2/clock36xx.h @@ -8,10 +8,6 @@ #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H #define __ARCH_ARM_MACH_OMAP2_CLOCK36XX_H -#ifdef CONFIG_COMMON_CLK extern int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk_hw *hw); -#else -extern const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore; -#endif #endif diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index a6f75cd..4eacab8 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -38,12 +38,8 @@ /* needed by omap3_core_dpll_m2_set_rate() */ struct clk *sdrc_ick_p, *arm_fck_p; -#ifdef CONFIG_COMMON_CLK int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) -#else -int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) -#endif { /* * According to the 12-5 CDP code from TI, "Limitation 2.5" @@ -55,11 +51,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; } -#ifdef CONFIG_COMMON_CLK return omap3_noncore_dpll_set_rate(hw, rate, parent_rate); -#else - return omap3_noncore_dpll_set_rate(clk, rate); -#endif } void __init omap3_clk_lock_dpll5(void) diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h index 87f098d..8cd4b0a 100644 --- a/arch/arm/mach-omap2/clock3xxx.h +++ b/arch/arm/mach-omap2/clock3xxx.h @@ -9,15 +9,10 @@ #define __ARCH_ARM_MACH_OMAP2_CLOCK3XXX_H int omap3xxx_clk_init(void); -#ifdef CONFIG_COMMON_CLK int omap3_dpll4_set_rate(struct clk_hw *clk, unsigned long rate, unsigned long parent_rate); int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, unsigned long parent_rate); -#else -int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); -int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); -#endif void omap3_clk_lock_dpll5(void); extern struct clk *sdrc_ick_p;