From patchwork Thu Nov 8 01:12:53 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 12736 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 0D55023E16 for ; Thu, 8 Nov 2012 01:13:44 +0000 (UTC) Received: from mail-ie0-f180.google.com (mail-ie0-f180.google.com [209.85.223.180]) by fiordland.canonical.com (Postfix) with ESMTP id BA67BA19295 for ; Thu, 8 Nov 2012 01:13:43 +0000 (UTC) Received: by mail-ie0-f180.google.com with SMTP id e10so3284274iej.11 for ; Wed, 07 Nov 2012 17:13:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:in-reply-to:references :mime-version:content-type:x-gm-message-state; bh=c916mK3JSHgTXyXsYVbd9xAbMVY9ZT4GBqFxPoruFBA=; b=cAaAcOa3WfqU2uQLyB7IzbKNp9eCg+VctBjs4sXUNEbNpS+UgQseUhORfvJMZ2RlDl YAWjsZZ54o1f75Mh2Pk4TT/4VvGdqiTO89sxRZkuvqGBcCvODIolFMvQKP1lW7B/Wmhl m/jRH/huqJdP6by54oXZ0l/oqJjirUMfhDOAKuVEwBzGO5OpDjulfgaHKqABQUL+XroD 6PJdD9CXKWWeoiwc/XhCM782oKZ0Pc+wzPaKa4n8yH9av9w4VykfGjdm5hpO/q3qDxuK cw4dzzkBX4gxc/zCjmcB1XR99Yh0wZKYjFvbdN8OC4m+Sp4psYB+YnGWIXakCVlmlrcB /a8Q== Received: by 10.50.140.97 with SMTP id rf1mr18293785igb.70.1352337223541; Wed, 07 Nov 2012 17:13:43 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp304356igt; Wed, 7 Nov 2012 17:13:43 -0800 (PST) Received: by 10.60.169.48 with SMTP id ab16mr3695484oec.15.1352337223187; Wed, 07 Nov 2012 17:13:43 -0800 (PST) Received: from devils.ext.ti.com (devils.ext.ti.com. [198.47.26.153]) by mx.google.com with ESMTPS id 3si12714071obl.7.2012.11.07.17.13.42 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 07 Nov 2012 17:13:43 -0800 (PST) Received-SPF: pass (google.com: domain of mturquette@ti.com designates 198.47.26.153 as permitted sender) client-ip=198.47.26.153; Authentication-Results: mx.google.com; spf=pass (google.com: domain of mturquette@ti.com designates 198.47.26.153 as permitted sender) smtp.mail=mturquette@ti.com Received: from dlelxv30.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id qA81Dgfl019598; Wed, 7 Nov 2012 19:13:42 -0600 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv30.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA81Dg0a003851; Wed, 7 Nov 2012 19:13:42 -0600 Received: from dlelxv22.itg.ti.com (172.17.1.197) by dfle73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.1.323.3; Wed, 7 Nov 2012 19:13:42 -0600 Received: from nucleus.nsc.com (nucleus.nsc.com [10.188.36.112]) by dlelxv22.itg.ti.com (8.13.8/8.13.8) with ESMTP id qA81DPLi015450; Wed, 7 Nov 2012 19:13:41 -0600 From: Mike Turquette To: CC: , , , , Mike Turquette Subject: [PATCH 18/26] ARM: OMAP4: clock: Cleanup !CONFIG_COMMON_CLK parts Date: Wed, 7 Nov 2012 17:12:53 -0800 Message-ID: <1352337181-29427-19-git-send-email-mturquette@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1352337181-29427-1-git-send-email-mturquette@ti.com> References: <1352337181-29427-1-git-send-email-mturquette@ti.com> MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlvJRCSIn1n3X07mEOYybVYlLJKteBCsGeHp6CAlgUpr2tKtj8vKlTHUXQaTYIDZpydzq8Z From: Rajendra Nayak Clean all #ifdef's added to OMAP4 clock code to make it COMMON clk ready, now that CONFIG_COMMON_CLK is enabled. Signed-off-by: Rajendra Nayak Signed-off-by: Mike Turquette --- arch/arm/mach-omap2/dpll44xx.c | 33 --------------------------------- arch/arm/mach-omap2/io.c | 2 -- 2 files changed, 35 deletions(-) diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c index aa75a3c..d3326c4 100644 --- a/arch/arm/mach-omap2/dpll44xx.c +++ b/arch/arm/mach-omap2/dpll44xx.c @@ -21,11 +21,7 @@ #include "cm-regbits-44xx.h" /* Supported only on OMAP4 */ -#ifdef CONFIG_COMMON_CLK int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk) -#else -int omap4_dpllmx_gatectrl_read(struct clk *clk) -#endif { u32 v; u32 mask; @@ -44,11 +40,7 @@ int omap4_dpllmx_gatectrl_read(struct clk *clk) return v; } -#ifdef CONFIG_COMMON_CLK void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk) -#else -void omap4_dpllmx_allow_gatectrl(struct clk *clk) -#endif { u32 v; u32 mask; @@ -66,11 +58,7 @@ void omap4_dpllmx_allow_gatectrl(struct clk *clk) __raw_writel(v, clk->clksel_reg); } -#ifdef CONFIG_COMMON_CLK void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk) -#else -void omap4_dpllmx_deny_gatectrl(struct clk *clk) -#endif { u32 v; u32 mask; @@ -88,17 +76,10 @@ void omap4_dpllmx_deny_gatectrl(struct clk *clk) __raw_writel(v, clk->clksel_reg); } -#ifdef CONFIG_COMMON_CLK const struct clk_hw_omap_ops clkhwops_omap4_dpllmx = { .allow_idle = omap4_dpllmx_allow_gatectrl, .deny_idle = omap4_dpllmx_deny_gatectrl, }; -#else -const struct clkops clkops_omap4_dpllmx_ops = { - .allow_idle = omap4_dpllmx_allow_gatectrl, - .deny_idle = omap4_dpllmx_deny_gatectrl, -}; -#endif /** * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit @@ -109,15 +90,10 @@ const struct clkops clkops_omap4_dpllmx_ops = { * OMAP4 ABE DPLL. Returns the DPLL's output rate (before M-dividers) * upon success, or 0 upon error. */ -#ifdef CONFIG_COMMON_CLK unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, unsigned long parent_rate) { struct clk_hw_omap *clk = to_clk_hw_omap(hw); -#else -unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk) -{ -#endif u32 v; unsigned long rate; struct dpll_data *dd; @@ -149,16 +125,11 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk *clk) * M-dividers) upon success, -EINVAL if @clk is null or not a DPLL, or * ~0 if an error occurred in omap2_dpll_round_rate(). */ -#ifdef CONFIG_COMMON_CLK long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw, unsigned long target_rate, unsigned long *parent_rate) { struct clk_hw_omap *clk = to_clk_hw_omap(hw); -#else -long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate) -{ -#endif u32 v; struct dpll_data *dd; long r; @@ -174,11 +145,7 @@ long omap4_dpll_regm4xen_round_rate(struct clk *clk, unsigned long target_rate) if (v) target_rate = target_rate / OMAP4430_REGM4XEN_MULT; -#ifdef CONFIG_COMMON_CLK r = omap2_dpll_round_rate(hw, target_rate, NULL); -#else - r = omap2_dpll_round_rate(clk, target_rate); -#endif if (r == ~0) return r; diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index a62010e..e6192cb 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -574,9 +574,7 @@ void __init omap4430_init_late(void) omap_mux_late_init(); omap2_common_pm_late_init(); omap4_pm_init(); -#ifdef CONFIG_COMMON_CLK omap2_clk_enable_autoidle_all(); -#endif } #endif