From patchwork Fri Jan 21 14:00:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vishwanath BS X-Patchwork-Id: 10 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:39:13 -0000 Delivered-To: patches@linaro.org Received: by 10.147.124.10 with SMTP id b10cs148473yan; Fri, 21 Jan 2011 05:57:46 -0800 (PST) Received: by 10.151.106.19 with SMTP id i19mr190667ybm.324.1295618265965; Fri, 21 Jan 2011 05:57:45 -0800 (PST) Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by mx.google.com with ESMTPS id k4si1399305ybe.27.2011.01.21.05.57.44 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 21 Jan 2011 05:57:44 -0800 (PST) Received-SPF: pass (google.com: domain of vishwanath.bs@ti.com designates 198.47.26.152 as permitted sender) client-ip=198.47.26.152; DomainKey-Status: bad format Authentication-Results: mx.google.com; spf=pass (google.com: domain of vishwanath.bs@ti.com designates 198.47.26.152 as permitted sender) smtp.mail=vishwanath.bs@ti.com; domainkeys=neutral (bad format) header.From=@ Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id p0LDvfD3000510 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 21 Jan 2011 07:57:43 -0600 Received: from localhost.localdomain (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p0LDvSPX010507; Fri, 21 Jan 2011 19:27:40 +0530 (IST) From: Vishwanath BS To: linux-omap@vger.kernel.org Cc: patches@linaro.org, Thara Gopinath Subject: [PATCH 07/13] OMAP3: Introduce custom set rate and get rate APIs for scalable devices Date: Fri, 21 Jan 2011 19:30:59 +0530 Message-Id: <1295618465-15234-8-git-send-email-vishwanath.bs@ti.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1295618465-15234-1-git-send-email-vishwanath.bs@ti.com> References: <1295618465-15234-1-git-send-email-vishwanath.bs@ti.com> From: Thara Gopinath This patch also introduces omap3_mpu_set_rate, omap3_iva_set_rate, omap3_l3_set_rate, omap3_mpu_get_rate, omap3_iva_get_rate, omap3_l3_get_rate as device specific set rate and get rate APIs for OMAP3 mpu, iva and l3_main devices. This patch also calls into omap_device_populate_rate_fns during system init to register various set_rate and get_rate APIs with the omap device layer Signed-off-by: Thara Gopinath --- arch/arm/mach-omap2/pm.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 71 insertions(+), 0 deletions(-) diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index d5a102c..1b94ad4 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -23,6 +23,9 @@ #include "powerdomain.h" #include "clockdomain.h" #include "pm.h" +#include "cm2xxx_3xxx.h" +#include "cm-regbits-34xx.h" +#include "prm.h" static struct omap_device_pm_latency *pm_lats; @@ -31,6 +34,8 @@ static struct device *iva_dev; static struct device *l3_dev; static struct device *dsp_dev; +static struct clk *dpll1_clk, *dpll2_clk, *dpll3_clk; + struct device *omap2_get_mpuss_device(void) { WARN_ON_ONCE(!mpu_dev); @@ -77,6 +82,55 @@ static int _init_omap_device(char *name, struct device **new_dev) return 0; } +static unsigned long omap3_mpu_get_rate(struct device *dev) +{ + return dpll1_clk->rate; +} + +static int omap3_mpu_set_rate(struct device *dev, unsigned long rate) +{ + int ret; + + ret = clk_set_rate(dpll1_clk, rate); + if (ret) { + dev_warn(dev, "%s: Unable to set rate to %ld\n", + __func__, rate); + return ret; + } + + return 0; +} + +static int omap3_iva_set_rate(struct device *dev, unsigned long rate) +{ + return clk_set_rate(dpll2_clk, rate); +} + +static unsigned long omap3_iva_get_rate(struct device *dev) +{ + return dpll2_clk->rate; +} + +static int omap3_l3_set_rate(struct device *dev, unsigned long rate) +{ + int l3_div; + + l3_div = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL) & + OMAP3430_CLKSEL_L3_MASK; + + return clk_set_rate(dpll3_clk, rate * l3_div); +} + +static unsigned long omap3_l3_get_rate(struct device *dev) +{ + int l3_div; + + l3_div = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL) & + OMAP3430_CLKSEL_L3_MASK; + return dpll3_clk->rate / l3_div; +} + + /* * Build omap_devices for processors and bus. */ @@ -90,6 +144,23 @@ static void omap2_init_processor_devices(void) } else { _init_omap_device("l3_main", &l3_dev); } + + if (cpu_is_omap34xx()) { + dpll1_clk = clk_get(NULL, "dpll1_ck"); + dpll2_clk = clk_get(NULL, "dpll2_ck"); + dpll3_clk = clk_get(NULL, "dpll3_m2_ck"); + + if (mpu_dev) + omap_device_register_dvfs_callbacks(mpu_dev, + omap3_mpu_set_rate, omap3_mpu_get_rate); + if (iva_dev) + omap_device_register_dvfs_callbacks(iva_dev, + omap3_iva_set_rate, omap3_iva_get_rate); + if (l3_dev) + omap_device_register_dvfs_callbacks(l3_dev, + omap3_l3_set_rate, omap3_l3_get_rate); + + } } /* Types of sleep_switch used in omap_set_pwrdm_state */