From patchwork Mon Jan 7 06:41:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 154851 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3170820ljp; Sun, 6 Jan 2019 22:43:08 -0800 (PST) X-Google-Smtp-Source: ALg8bN47Z1PAAr+q9n13L5VEiARZDMAMzKMOf+lbM5Aex9V6tJlo8dOOqmjDM6Dn0uhEu/lLXgKW X-Received: by 2002:a17:902:346:: with SMTP id 64mr61849804pld.337.1546843388868; Sun, 06 Jan 2019 22:43:08 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546843388; cv=none; d=google.com; s=arc-20160816; b=S8uRDWsdNhm4I8FwMWRvac29kYzgaftgFAhrlzK7AUTTkZl6qaABtnTebQoPZf5mJS l2wraC/FwxgMrKYW058tl0gzKzWBF8kFbj2Kv2XtlV/2XGmTsP4nxWw08IT+FKORgxFE FMYviFPswx8Sy4JqblWXcf0SSjOBdh5prHZG2yD2C+UcaU9FjkkFDpz7Diwz9fw56we8 O1OxB7JyqcOGM6QTXs7z1u/8h3vxthXPG9Wmhvxv++TIVYpyQ6rpvI+e5oW/QOE3D6Ji asupxGmI9Fc2cXggL319Q6h3XnupkJg1J+Eg+ejyuFlfz2r02D53Vchpg+sj285jCNMK sm9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=DSaAqsEfEzTCywHsfjCCo04K82q4H4Dl4uu8P0Qbj8E=; b=AUQWRlTQE/gJiczA31HhwYdDO2duQBBNt27Vs0sxjbPrlvlVB2+FDLxoCa91waZZWv fEmKu6E6JmPBiZlC8OETbtYp54wLY/7gdwwlKyOU5xuKSgt5FxEZO61fQVpAOs+RBH9M +bUNWZoOPfkTbp2a2pIwJuackgRLW/HPBd+ho2HNh+kNM4obkBeVnT6OzcwEeURRfSaw DBQsjxcd9/vIZZITrjRgIZra3Y2BpsBzjmmFoCof5+gvh311axLa8fgAL6e8q8rqi3Gc VK8CGIDHdI67mGyDlqQCXVMZf5TqMaPDrQ4Ogb8vvtu+6OxXcHmk5iUXsWKbKgpz72kq 6mzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kZPHA6oK; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e11si16574408pls.71.2019.01.06.22.43.08; Sun, 06 Jan 2019 22:43:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=kZPHA6oK; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726257AbfAGGnG (ORCPT + 5 others); Mon, 7 Jan 2019 01:43:06 -0500 Received: from fllv0016.ext.ti.com ([198.47.19.142]:36580 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725771AbfAGGnG (ORCPT ); Mon, 7 Jan 2019 01:43:06 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id x076gj8U021418; Mon, 7 Jan 2019 00:42:45 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1546843365; bh=DSaAqsEfEzTCywHsfjCCo04K82q4H4Dl4uu8P0Qbj8E=; h=From:To:CC:Subject:Date; b=kZPHA6oKtBt1ZBJwMnyd7XEFM3Wof6RkU8UM+/WBldwlDlTJ9C4TudSECdkNDY3uT 45/oMF49uYteHJENr2aMvBzAL0fQEfhHFhnYw53lhFjygBFUwsVtn+T3FQaS0Ob1/M kuiWp+HxVP10lXqyVFFtPGWLZavoseBONQMM0zWE= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x076gj8A070684 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Mon, 7 Jan 2019 00:42:45 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Mon, 7 Jan 2019 00:42:45 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Mon, 7 Jan 2019 00:42:45 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x076gfnv002672; Mon, 7 Jan 2019 00:42:41 -0600 From: Kishon Vijay Abraham I To: Lorenzo Pieralisi , Bjorn Helgaas , Gustavo Pimentel , Alan Douglas , Shawn Lin CC: Jingoo Han , Heiko Stuebner , Cyrille Pitchen , Jia-Ju Bai , , , , , , Subject: [PATCH 00/15] PCI: endpoint: Cleanup EPC features Date: Mon, 7 Jan 2019 12:11:33 +0530 Message-ID: <20190107064148.10152-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi Lorenzo, The Endpoint controller driver uses features member in 'struct pci_epc' to advertise the list of supported features to the endpoint function driver. There are a few shortcomings with this approach. *) Certain endpoint controllers support fixed size BAR (e.g. TI's AM654 uses Designware configuration with fixed size BAR). The size of each BARs cannot be passed to the endpoint function driver. *) Too many macros for handling EPC features. (EPC_FEATURE_NO_LINKUP_NOTIFIER, EPC_FEATURE_BAR_MASK, EPC_FEATURE_MSIX_AVAILABLE, EPC_FEATURE_SET_BAR, EPC_FEATURE_GET_BAR) *) Endpoint controllers are directly modifying struct pci_epc members. (I have plans to move struct pci_epc to drivers/pci/endpoint so that pci_epc members are referenced only by endpoint core). To overcome the above shortcomings, introduced pci_epc_get_features() API, pci_epc_features structure and a ->get_features() callback. Also added a patch to set BAR flags in pci_epf_alloc_space and remove it from pci-epf-test function driver. Tested on TI's DRA7xx platform. Thanks Kishon Kishon Vijay Abraham I (15): PCI: endpoint: Add new pci_epc_ops to get EPC features PCI: dwc: Add ->get_features() callback function in dw_pcie_ep_ops PCI: designware-plat: Populate ->get_features() dw_pcie_ep_ops PCI: pci-dra7xx: Populate ->get_features() dw_pcie_ep_ops PCI: rockchip: Populate ->get_features() dw_pcie_ep_ops PCI: cadence: Populate ->get_features() cdns_pcie_epc_ops PCI: endpoint: Add helper to get first unreserved BAR PCI: endpoint: Fix pci_epf_alloc_space to set correct MEM TYPE flags PCI: pci-epf-test: Remove setting epf_bar flags in function driver PCI: pci-epf-test: Do not allocate next BARs memory if current BAR is 64Bit PCI: pci-epf-test: Use pci_epc_get_features to get EPC features PCI: cadence: Remove pci_epf_linkup from Cadence EP driver PCI: rockchip: Remove pci_epf_linkup from Rockchip EP driver PCI: designware-plat: Remove setting epc->features in Designware plat EP driver PCI: endpoint: Remove features member in struct pci_epc drivers/pci/controller/dwc/pci-dra7xx.c | 13 +++ .../pci/controller/dwc/pcie-designware-ep.c | 12 +++ .../pci/controller/dwc/pcie-designware-plat.c | 17 +++- drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/controller/pcie-cadence-ep.c | 25 +++--- drivers/pci/controller/pcie-rockchip-ep.c | 16 +++- drivers/pci/endpoint/functions/pci-epf-test.c | 80 ++++++++++--------- drivers/pci/endpoint/pci-epc-core.c | 52 ++++++++++++ drivers/pci/endpoint/pci-epf-core.c | 3 + include/linux/pci-epc.h | 30 +++++-- 10 files changed, 185 insertions(+), 64 deletions(-) -- 2.17.1 Tested-by: Heiko Stuebner