From patchwork Thu May 31 12:41:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 137369 Delivered-To: patch@linaro.org Received: by 2002:a2e:9706:0:0:0:0:0 with SMTP id r6-v6csp6549149lji; Thu, 31 May 2018 05:41:35 -0700 (PDT) X-Google-Smtp-Source: ADUXVKIrq8ErTZGTFgs2O+Tb+rWQ4fuLaeccKs+YmInJSiTTNXxKVnaauOZefzBO86r+C56cjQSm X-Received: by 2002:a63:65c4:: with SMTP id z187-v6mr5318017pgb.180.1527770495362; Thu, 31 May 2018 05:41:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1527770495; cv=none; d=google.com; s=arc-20160816; b=hKhSPtsOLehCqBMeGN3qVOzEhrnl+9tXSt75uEvdkvDDHe6LeFjs5ARshiaNhxAg0Z RJw6aUa9T0c/iYfk2z71ROrYZM1YMVdi+msunPMHB9Tok+kAt76HHfxTAtskrw8c6V2P OsKceGjkH98iAq4vJPTzCGyEntDL3FFLXhVzcTBrTVtaiqeXiV/lZZMqe5K06X77bZye s7m9zxp+HqENXggbIDcDZ5xbQ6Z2jTSfLusQSpnoyXsiaPSmhmAoy+mxlObKVgshrUDI zMbllk1gwCJp08imntlEb0SDA+hVxIAJYmLQHh3+rBlHM3JyaeJ7bhrDGfpjo2kz+cyw tnug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:subject:cc :to:from:dkim-signature:arc-authentication-results; bh=83x4AdJGpBL1Ye5jyHTG9tQaaLlUEokXgRX+6veieq4=; b=bENIjy3J5xz+D8vkj8LlKV9PTenrMxfCx3ZsVVtBMcX8Fp2/i1dIj8F89cv8+J3SHk 6rjHcajXfspFwUvuDOjBb0mBwcbwFcP6zv5l4PFi5JJaSdRM7M/dgbtWdIfxkOa0JkbA 3WmA5xdStcpEtnwvEda4Bi5VI7Ez3BBjb6dTveJ1HvkZ347EbxrzcgNXBbEZUEQdFWr9 GrY1NmjZ2y/C95tRtlU/yA9DCIE3702tiQ8cdGJ3cxy6KLsMjPHUzbx99T3U944MovTc El4K70N90vfFl8Sb9xTepKSAJT8hITmnGh9e8MAJnYAeAetYrkh1ZqX+fcjr2zQ4eGaf IvYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=EZtK2Mhr; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 7-v6si38961584pff.154.2018.05.31.05.41.35; Thu, 31 May 2018 05:41:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=EZtK2Mhr; spf=pass (google.com: best guess record for domain of linux-omap-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755027AbeEaMle (ORCPT + 5 others); Thu, 31 May 2018 08:41:34 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:10857 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754801AbeEaMld (ORCPT ); Thu, 31 May 2018 08:41:33 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w4VCfS29015457; Thu, 31 May 2018 07:41:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1527770488; bh=NrwHcjYJkvIjWlAMb0pxgEH79EOsY4ocQKwtcdSoqLA=; h=From:To:CC:Subject:Date; b=EZtK2MhrfInhq4BM1yyYP0v/zOzhMEPcoLyVTst9Os2WYprGsYE3XYbTaMXFfaBQ3 oellgnb7UAKItqmmN5OdqcVGH74HKEmx0/qJNgu5zZsgEyXMR8fcPPmoA8oMbNrzRU 4Wd2BKzRsPB5/y4KoaBpXaRzXTaFR0KVQzjTrriQ= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCfSwi006516; Thu, 31 May 2018 07:41:28 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Thu, 31 May 2018 07:41:28 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Thu, 31 May 2018 07:41:28 -0500 Received: from deskari.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w4VCfQS1002799; Thu, 31 May 2018 07:41:26 -0500 From: Tomi Valkeinen To: , , Laurent Pinchart , Peter Ujfalusi , Jyri Sarha , Benoit Parrot CC: Tomi Valkeinen Subject: [RFC PATCH 0/6] drm/tidss: new display driver for TI's DSS6 Date: Thu, 31 May 2018 15:41:03 +0300 Message-ID: <20180531124109.3209-1-tomi.valkeinen@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org Hi, This is a new DRM driver for Texas Instruments' Keystone K2G SoC. K2G has DSS6 IP, which is related to the OMAP DSS IPs handled by the omapdrm driver. While on higher level the DSS6 resembles the older DSS versions, the registers and the internal pipelines differ a lot. DSS6 IP on K2G is a "ultra-light" version, and has only a single plane and a single output. The driver will also support future DSS versions, like DSS7 on AM6 SoC, which supports multiple planes and outputs, so the driver already has support for those. This is also the reason for the dispc abstraction layer. The series is an RFC, as I want to include the DSS7 driver in the final version. I hope that's ready in a week or two. I'm looking for comments on the overall architecture. Tomi Peter Ujfalusi (1): drm: Add support for extracting sync signal drive edge from videomode Tomi Valkeinen (5): dt-bindings: display/ti: add k2g-dss bindings drm/tidss: add new driver for TI Keystone platforms drm/panel: simple: add newhaven,nhd-4.3-480272ef-atxl LCD ARM: dts: keystone-k2g: add DSS node ARM: dts: keystone-k2g-evm: add LCD and HDMI displays .../panel/newhaven,nhd-4.3-480272ef-atxl.txt | 7 + .../bindings/display/ti/ti,k2g-dss.txt | 15 + MAINTAINERS | 8 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/keystone-k2g-evm-lcd.dts | 80 + arch/arm/boot/dts/keystone-k2g-evm.dts | 91 ++ arch/arm/boot/dts/keystone-k2g.dtsi | 21 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/drm_modes.c | 15 +- drivers/gpu/drm/panel/panel-simple.c | 29 + drivers/gpu/drm/tidss/Kconfig | 10 + drivers/gpu/drm/tidss/Makefile | 11 + drivers/gpu/drm/tidss/tidss_crtc.c | 464 ++++++ drivers/gpu/drm/tidss/tidss_crtc.h | 50 + drivers/gpu/drm/tidss/tidss_dispc.h | 146 ++ drivers/gpu/drm/tidss/tidss_dispc6.c | 1397 +++++++++++++++++ drivers/gpu/drm/tidss/tidss_dispc6.h | 12 + drivers/gpu/drm/tidss/tidss_dispc6_regs.h | 109 ++ drivers/gpu/drm/tidss/tidss_drv.c | 331 ++++ drivers/gpu/drm/tidss/tidss_drv.h | 41 + drivers/gpu/drm/tidss/tidss_encoder.c | 101 ++ drivers/gpu/drm/tidss/tidss_encoder.h | 22 + drivers/gpu/drm/tidss/tidss_irq.c | 193 +++ drivers/gpu/drm/tidss/tidss_irq.h | 25 + drivers/gpu/drm/tidss/tidss_kms.c | 85 + drivers/gpu/drm/tidss/tidss_kms.h | 14 + drivers/gpu/drm/tidss/tidss_plane.c | 187 +++ drivers/gpu/drm/tidss/tidss_plane.h | 25 + include/drm/drm_connector.h | 4 + 30 files changed, 3493 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/panel/newhaven,nhd-4.3-480272ef-atxl.txt create mode 100644 Documentation/devicetree/bindings/display/ti/ti,k2g-dss.txt create mode 100644 arch/arm/boot/dts/keystone-k2g-evm-lcd.dts create mode 100644 drivers/gpu/drm/tidss/Kconfig create mode 100644 drivers/gpu/drm/tidss/Makefile create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.c create mode 100644 drivers/gpu/drm/tidss/tidss_crtc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc6.c create mode 100644 drivers/gpu/drm/tidss/tidss_dispc6.h create mode 100644 drivers/gpu/drm/tidss/tidss_dispc6_regs.h create mode 100644 drivers/gpu/drm/tidss/tidss_drv.c create mode 100644 drivers/gpu/drm/tidss/tidss_drv.h create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.c create mode 100644 drivers/gpu/drm/tidss/tidss_encoder.h create mode 100644 drivers/gpu/drm/tidss/tidss_irq.c create mode 100644 drivers/gpu/drm/tidss/tidss_irq.h create mode 100644 drivers/gpu/drm/tidss/tidss_kms.c create mode 100644 drivers/gpu/drm/tidss/tidss_kms.h create mode 100644 drivers/gpu/drm/tidss/tidss_plane.c create mode 100644 drivers/gpu/drm/tidss/tidss_plane.h -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 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