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[2607:7c80:54:e::133]) by mx.google.com with ESMTPS id bq13-20020a056a000e0d00b004fa3a8dffd1si11407380pfb.136.2022.04.19.09.49.25 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Apr 2022 09:49:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) client-ip=2607:7c80:54:e::133; Authentication-Results: mx.google.com; dkim=pass header.i=@lists.infradead.org header.s=bombadil.20210309 header.b=fG7y98+I; dkim=neutral (body hash did not verify) header.i=@kernel.org header.s=k20201202 header.b="j/NCSeP8"; spf=pass (google.com: best guess record for domain of linux-mtd-bounces+patch=linaro.org@lists.infradead.org designates 2607:7c80:54:e::133 as permitted sender) smtp.mailfrom="linux-mtd-bounces+patch=linaro.org@lists.infradead.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/PtkZMIGej27Rg9dBLhl0drmzM0h7GxHd2xCqXvuimg=; b=fG7y98+I69H+bJ 1lQmzcO26bnH1+rj3kWwEy+3x0sJ5UopxtL5U24pUJd0rfmf9yHff9skkq9ZCQ3/flF5V6qdxOCJR nge/+z78S2xs+3dB9D2HAiZA6MTkjE08+jfy/cH2mnT71mfJOnKgC+l8KNYJhibD0RIy4HiMiXU7E 8n0Qx8zhNC48hxj5wK9sZqTR1wBCvWITcpFEocW+6sFV9LPxnZmSCNojcEKnpkEw6ys3crhYCF/TH +lGzo1f3Y0Zpmig52oLf77SPyy+P8zsHX2Va/oiFZLt8rPiyPlTRaj+RF7yADnhYMg8O/qJRH6+q+ 8yluqZho/i9BFQhYSH4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ngr1o-0050j5-23; Tue, 19 Apr 2022 16:48:36 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ngqtZ-004wEu-HY; Tue, 19 Apr 2022 16:40:13 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1A2AEB81BF2; Tue, 19 Apr 2022 16:40:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0A57C385B0; Tue, 19 Apr 2022 16:39:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650386402; bh=Fa4t+DkHHVinGTfyny9fnUHb+3BmvDV9Sv/bDUMb99g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j/NCSeP8NzRWUw8W6MpOSbmGTBu7/2YhXCemKDewCPqMH6cwTZLL/oiGN4LpCoujp 1SH3dQdFs3D3xtEm0/2uHyHJF7ZmzaRFqw8BaYDXyP6SWjgPPzn/jAQpcq4C1TNBpv thu2mXNQ6U7As7UR42IeQ64eiqae7mP2OoMLr4aAsZgj/eIm4qTKBztmk5D4dhw3th zON/5Z8YRyAnPU6fpP3DtJeivcDYlhBEyShGPle3yivs+DidLS4qH4YNZZ6eCXuSjQ NN99Z6FWIFBg8B1PRrkV9Ov79jsTc8IqXABoKaDE9bpFLy7xgW0qPIU9vBW0RFDG3G QCDqkjxI1s54w== From: Arnd Bergmann To: robert.jarzmik@free.fr, linux-arm-kernel@lists.infradead.org Cc: Arnd Bergmann , Daniel Mack , Haojian Zhuang , Marek Vasut , Philipp Zabel , Lubomir Rintel , Paul Parsons , Tomas Cech , Sergey Lapin , Thomas Bogendoerfer , Michael Turquette , Stephen Boyd , "Rafael J. Wysocki" , Viresh Kumar , Dmitry Torokhov , Ulf Hansson , Dominik Brodowski , Helge Deller , Mark Brown , Linus Walleij , linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, linux-ide@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-input@vger.kernel.org, patches@opensource.cirrus.com, linux-leds@vger.kernel.org, linux-mmc@vger.kernel.org, linux-mtd@lists.infradead.org, linux-rtc@vger.kernel.org, linux-usb@vger.kernel.org, linux-fbdev@vger.kernel.org, dri-devel@lists.freedesktop.org, alsa-devel@alsa-project.org, Wim Van Sebroeck , Guenter Roeck , linux-watchdog@vger.kernel.org Subject: [PATCH 09/48] watchdog: sa1100: use platform device registration Date: Tue, 19 Apr 2022 18:37:31 +0200 Message-Id: <20220419163810.2118169-10-arnd@kernel.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20220419163810.2118169-1-arnd@kernel.org> References: <20220419163810.2118169-1-arnd@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220419_094005_958980_5B84C3E6 X-CRM114-Status: GOOD ( 29.10 ) X-Spam-Score: -5.4 (-----) X-Spam-Report: Spam detection software, running on the system "bombadil.infradead.org", has NOT identified this incoming email as spam. The original message has been attached to this so you can view it or label similar future email. If you have any questions, see the administrator of that system for details. Content preview: From: Arnd Bergmann Rather than relying on machine specific headers to pass down the reboot status and the register locations, use resources and platform_data. Aside from this, keep the changes to a minimum. Content analysis details: (-5.4 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [145.40.68.75 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.2 DKIMWL_WL_HIGH DKIMwl.org - High trust sender X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+patch=linaro.org@lists.infradead.org From: Arnd Bergmann Rather than relying on machine specific headers to pass down the reboot status and the register locations, use resources and platform_data. Aside from this, keep the changes to a minimum. Cc: Wim Van Sebroeck Cc: Guenter Roeck Cc: linux-watchdog@vger.kernel.org Signed-off-by: Arnd Bergmann Acked-by: Guenter Roeck --- arch/arm/mach-pxa/devices.c | 11 +++ arch/arm/mach-pxa/include/mach/regs-ost.h | 2 + arch/arm/mach-pxa/include/mach/reset.h | 2 +- arch/arm/mach-pxa/pxa25x.c | 2 +- arch/arm/mach-pxa/pxa27x.c | 2 +- arch/arm/mach-pxa/pxa3xx.c | 2 +- arch/arm/mach-pxa/reset.c | 3 - arch/arm/mach-sa1100/generic.c | 6 +- arch/arm/mach-sa1100/include/mach/reset.h | 1 - drivers/watchdog/sa1100_wdt.c | 87 ++++++++++++++++------- 10 files changed, 83 insertions(+), 35 deletions(-) diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 454523237c97..12f78636045f 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -24,6 +24,8 @@ #include #include +#include +#include #include "devices.h" #include "generic.h" @@ -1118,3 +1120,12 @@ void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata) { pxa_register_device(&pxa2xx_pxa_dma, dma_pdata); } + +void __init pxa_register_wdt(unsigned int reset_status) +{ + struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN); + + reset_status &= RESET_STATUS_WATCHDOG; + platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1, + &reset_status, sizeof(reset_status)); +} diff --git a/arch/arm/mach-pxa/include/mach/regs-ost.h b/arch/arm/mach-pxa/include/mach/regs-ost.h index 109d0ed264df..c8001cfc8d6b 100644 --- a/arch/arm/mach-pxa/include/mach/regs-ost.h +++ b/arch/arm/mach-pxa/include/mach/regs-ost.h @@ -7,6 +7,8 @@ /* * OS Timer & Match Registers */ +#define OST_PHYS 0x40A00000 +#define OST_LEN 0x00000020 #define OSMR0 io_p2v(0x40A00000) /* */ #define OSMR1 io_p2v(0x40A00004) /* */ diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h index e1c4d100fd45..963dd190bc13 100644 --- a/arch/arm/mach-pxa/include/mach/reset.h +++ b/arch/arm/mach-pxa/include/mach/reset.h @@ -8,8 +8,8 @@ #define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */ #define RESET_STATUS_ALL (0xf) -extern unsigned int reset_status; extern void clear_reset_status(unsigned int mask); +extern void pxa_register_wdt(unsigned int reset_status); /** * init_gpio_reset() - register GPIO as reset generator diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 305047ebd2f1..dfc90b41fba3 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -240,7 +240,7 @@ static int __init pxa25x_init(void) if (cpu_is_pxa25x()) { - reset_status = RCSR; + pxa_register_wdt(RCSR); pxa25x_init_pm(); diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index a81ac88ecbfd..38fdd22c4dc5 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -337,7 +337,7 @@ static int __init pxa27x_init(void) if (cpu_is_pxa27x()) { - reset_status = RCSR; + pxa_register_wdt(RCSR); pxa27x_init_pm(); diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index fc84aed99481..7c569fa2a6da 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -463,7 +463,7 @@ static int __init pxa3xx_init(void) if (cpu_is_pxa3xx()) { - reset_status = ARSR; + pxa_register_wdt(ARSR); /* * clear RDH bit every time after reset diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index af78405aa4e9..fcb791c5ae3e 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -11,9 +11,6 @@ #include #include -unsigned int reset_status; -EXPORT_SYMBOL(reset_status); - static void do_hw_reset(void); static int reset_gpio = -1; diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 4dfb7554649d..6c21f214cd60 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -39,9 +39,6 @@ #include "generic.h" #include -unsigned int reset_status; -EXPORT_SYMBOL(reset_status); - #define NR_FREQS 16 /* @@ -319,10 +316,13 @@ static struct platform_device *sa11x0_devices[] __initdata = { static int __init sa1100_init(void) { + struct resource wdt_res = DEFINE_RES_MEM(0x90000000, 0x20); pm_power_off = sa1100_power_off; regulator_has_full_constraints(); + platform_device_register_simple("sa1100_wdt", -1, &wdt_res, 1); + return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); } diff --git a/arch/arm/mach-sa1100/include/mach/reset.h b/arch/arm/mach-sa1100/include/mach/reset.h index 27695650a567..a6723d45ae2a 100644 --- a/arch/arm/mach-sa1100/include/mach/reset.h +++ b/arch/arm/mach-sa1100/include/mach/reset.h @@ -10,7 +10,6 @@ #define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */ #define RESET_STATUS_ALL (0xf) -extern unsigned int reset_status; static inline void clear_reset_status(unsigned int mask) { RCSR = mask; diff --git a/drivers/watchdog/sa1100_wdt.c b/drivers/watchdog/sa1100_wdt.c index d33f0375112f..2d0a06a158a8 100644 --- a/drivers/watchdog/sa1100_wdt.c +++ b/drivers/watchdog/sa1100_wdt.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -30,16 +31,42 @@ #include #include -#ifdef CONFIG_ARCH_PXA -#include -#endif +#define REG_OSMR0 0x0000 /* OS timer Match Reg. 0 */ +#define REG_OSMR1 0x0004 /* OS timer Match Reg. 1 */ +#define REG_OSMR2 0x0008 /* OS timer Match Reg. 2 */ +#define REG_OSMR3 0x000c /* OS timer Match Reg. 3 */ +#define REG_OSCR 0x0010 /* OS timer Counter Reg. */ +#define REG_OSSR 0x0014 /* OS timer Status Reg. */ +#define REG_OWER 0x0018 /* OS timer Watch-dog Enable Reg. */ +#define REG_OIER 0x001C /* OS timer Interrupt Enable Reg. */ -#include +#define OSSR_M3 (1 << 3) /* Match status channel 3 */ +#define OSSR_M2 (1 << 2) /* Match status channel 2 */ +#define OSSR_M1 (1 << 1) /* Match status channel 1 */ +#define OSSR_M0 (1 << 0) /* Match status channel 0 */ + +#define OWER_WME (1 << 0) /* Watchdog Match Enable */ + +#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ +#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ +#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ +#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ static unsigned long oscr_freq; static unsigned long sa1100wdt_users; static unsigned int pre_margin; static int boot_status; +static void __iomem *reg_base; + +static inline void sa1100_wr(u32 val, u32 offset) +{ + writel_relaxed(val, reg_base + offset); +} + +static inline u32 sa1100_rd(u32 offset) +{ + return readl_relaxed(reg_base + offset); +} /* * Allow only one person to hold it open @@ -50,10 +77,10 @@ static int sa1100dog_open(struct inode *inode, struct file *file) return -EBUSY; /* Activate SA1100 Watchdog timer */ - writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3); - writel_relaxed(OSSR_M3, OSSR); - writel_relaxed(OWER_WME, OWER); - writel_relaxed(readl_relaxed(OIER) | OIER_E3, OIER); + sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3); + sa1100_wr(OSSR_M3, REG_OSSR); + sa1100_wr(OWER_WME, REG_OWER); + sa1100_wr(sa1100_rd(REG_OIER) | OIER_E3, REG_OIER); return stream_open(inode, file); } @@ -61,7 +88,7 @@ static int sa1100dog_open(struct inode *inode, struct file *file) * The watchdog cannot be disabled. * * Previous comments suggested that turning off the interrupt by - * clearing OIER[E3] would prevent the watchdog timing out but this + * clearing REG_OIER[E3] would prevent the watchdog timing out but this * does not appear to be true (at least on the PXA255). */ static int sa1100dog_release(struct inode *inode, struct file *file) @@ -76,7 +103,7 @@ static ssize_t sa1100dog_write(struct file *file, const char __user *data, { if (len) /* Refresh OSMR3 timer. */ - writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3); + sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3); return len; } @@ -110,7 +137,7 @@ static long sa1100dog_ioctl(struct file *file, unsigned int cmd, break; case WDIOC_KEEPALIVE: - writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3); + sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3); ret = 0; break; @@ -125,7 +152,7 @@ static long sa1100dog_ioctl(struct file *file, unsigned int cmd, } pre_margin = oscr_freq * time; - writel_relaxed(readl_relaxed(OSCR) + pre_margin, OSMR3); + sa1100_wr(sa1100_rd(REG_OSCR) + pre_margin, REG_OSMR3); fallthrough; case WDIOC_GETTIMEOUT: @@ -151,12 +178,22 @@ static struct miscdevice sa1100dog_miscdev = { .fops = &sa1100dog_fops, }; -static int margin __initdata = 60; /* (secs) Default is 1 minute */ +static int margin = 60; /* (secs) Default is 1 minute */ static struct clk *clk; -static int __init sa1100dog_init(void) +static int sa1100dog_probe(struct platform_device *pdev) { int ret; + int *platform_data; + struct resource *res; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENXIO; + reg_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); + ret = PTR_ERR_OR_ZERO(reg_base); + if (ret) + return ret; clk = clk_get(NULL, "OSTIMER0"); if (IS_ERR(clk)) { @@ -174,13 +211,9 @@ static int __init sa1100dog_init(void) oscr_freq = clk_get_rate(clk); - /* - * Read the reset status, and save it for later. If - * we suspend, RCSR will be cleared, and the watchdog - * reset reason will be lost. - */ - boot_status = (reset_status & RESET_STATUS_WATCHDOG) ? - WDIOF_CARDRESET : 0; + platform_data = pdev->dev.platform_data; + if (platform_data && *platform_data) + boot_status = WDIOF_CARDRESET; pre_margin = oscr_freq * margin; ret = misc_register(&sa1100dog_miscdev); @@ -196,15 +229,21 @@ static int __init sa1100dog_init(void) return ret; } -static void __exit sa1100dog_exit(void) +static int sa1100dog_remove(struct platform_device *pdev) { misc_deregister(&sa1100dog_miscdev); clk_disable_unprepare(clk); clk_put(clk); + + return 0; } -module_init(sa1100dog_init); -module_exit(sa1100dog_exit); +struct platform_driver sa1100dog_driver = { + .driver.name = "sa1100_wdt", + .probe = sa1100dog_probe, + .remove = sa1100dog_remove, +}; +module_platform_driver(sa1100dog_driver); MODULE_AUTHOR("Oleg Drokin "); MODULE_DESCRIPTION("SA1100/PXA2xx Watchdog");