From patchwork Thu Aug 29 10:15:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Victor Shih X-Patchwork-Id: 824530 Received: from mail-pf1-f174.google.com (mail-pf1-f174.google.com [209.85.210.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2705E18EFE2; Thu, 29 Aug 2024 10:16:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724926600; cv=none; b=U6ECYHc8xmLBeDpUJns5NQnlZPa3QvVZzkwmTaKgzJqTNU3M/ApBzwEO4orBEjkcL4Xein+ktr6JH30mkanb4hFuEzzGiQud3J88/U5MFdk8eYOMnrzV/DHElF+yorEF9AzWYOdPt6wHfX5JnnWr9m00P5QRzZvlPPH8TD/xkig= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724926600; c=relaxed/simple; bh=ZXGEzaz3HiWknyeUmK9tPtLjvRCZ9IuLbN+IF8lFSPs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DkjcIRKEpoQnsq+PR32fc4BaLGGSA/d1qb9Vs/vsq2SUTfc0cDmKvZ89pzOGhyvm6YcxaOLUIbHirE9ZFuad/WxE4N9js62+4tNm1wm+H9479TEGCIQKIgR1ksnTD5Fk7wycU7zM+44Zo1BMnAkfUo8xw0casiGv7FIlUFrqyjY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=aF53NTv9; arc=none smtp.client-ip=209.85.210.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aF53NTv9" Received: by mail-pf1-f174.google.com with SMTP id d2e1a72fcca58-7142e4dddbfso381679b3a.0; Thu, 29 Aug 2024 03:16:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1724926598; x=1725531398; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=frHRewf0pkcu1synjclcnqgZV+fZOIZRmQD7b9toY3A=; b=aF53NTv9kQ0iWwz24UCQHzdvKj/dmm5tl7UXRw1nWWc5Nt9MU9r9+X1ayzk5CXPZ4e ndEStkDl91GzUeTCJIgnPjGBHo5T2Pp8AAb7EW92L/RQgWaJuj5e51R1XmEtc6TpsxLE snITmdzkvZmST3FULhe8XjtTMxrmcfPyjoS+M7+ZzwTebQ36kMO4ciWoOsYlFdc6TbRd TnFkoifYKPHmuWKGuCkSbTxtThTFfTo0jkN/t0HamcW1ts6KUvA2gJQ8XqY6/Vd0p6Un t6NHzbu72x3ICKcuLGduU0MmoxO8zA+HWJRrOuArN1dQcPKRX/LEkfNHZnBIQ7VVjT8d P0Jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1724926598; x=1725531398; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=frHRewf0pkcu1synjclcnqgZV+fZOIZRmQD7b9toY3A=; b=XEHFtlf2414zzoUPW4LAuv42fR31J7XLZWMYNnigA91RDUoAJcgJ7k+8qhcAbjzSEX KP/IlOQ/K5OOI2y6Jcxk/0u8Dv9ehjcHgx5zCBad8SvR67LzwPWCtq/bwo/qJ4Chznk4 jmRi5LPY9b4uvol8hv7dSqeEPnov9plhxb0p9IyJxhfFBY8cMSVlUAKwg2ZUAya954l0 uzTmvqYKD2/k6HjgroQDdzWrEcEWFh3B5dCZdz28lbNt3uR4UfJY9x2yR66dBYlkesux 6M5KxZH7+wFna6rV7a1jA57DyzzTV7pJYyJO3tWWxRW9ztLPjD6/wI5b3oH64+fOqqKq Iw8w== X-Forwarded-Encrypted: i=1; AJvYcCUp7PeEycUoTTZA4CetaSYPcm2bm6C67HSAFwio8xSx6cS6kGqKNrxZ9dJqSR8rrT/JaEguEYWCeVag8Ps=@vger.kernel.org X-Gm-Message-State: AOJu0YzL74KtQM2Z1CnJA6h4zzHuGFqXICn+m1lBX8WjdY2yvMjcLMia 1pEZwDWkJWNSc+NEXVmPSy8w3+UVqcQV7j7OVlfxT8I5s7/FQUhU X-Google-Smtp-Source: AGHT+IFK/i7bn2Yt77POAH51pVuNcZOONgmRKvhi6e++nBApAqvWTW8lFaDdEbgPkrmpIjKRozAVzQ== X-Received: by 2002:a05:6a21:164a:b0:1be:c86e:7a4d with SMTP id adf61e73a8af0-1cce111c7ddmr2374927637.53.1724926598283; Thu, 29 Aug 2024 03:16:38 -0700 (PDT) Received: from localhost.localdomain ([2402:7500:479:a52:632f:b914:4ddf:273]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-715e56d77eesm816577b3a.153.2024.08.29.03.16.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Aug 2024 03:16:38 -0700 (PDT) From: Victor Shih To: ulf.hansson@linaro.org, adrian.hunter@intel.com Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, Lucas.Lai@genesyslogic.com.tw, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, dlunev@chromium.org, Victor Shih , Ben Chuang , AKASHI Takahiro , Victor Shih Subject: [PATCH V19 12/22] mmc: sdhci-uhs2: add set_power() to support vdd2 Date: Thu, 29 Aug 2024 18:15:29 +0800 Message-Id: <20240829101539.5058-13-victorshihgli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240829101539.5058-1-victorshihgli@gmail.com> References: <20240829101539.5058-1-victorshihgli@gmail.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Victor Shih This is a UHS-II version of sdhci's set_power operation. Use sdhci_uhs2_set_power() to set VDD2 for support UHS2 interface. VDD2, as well as VDD, is handled here. Signed-off-by: Ben Chuang Signed-off-by: AKASHI Takahiro Signed-off-by: Victor Shih --- Updates in V17: - Export sdhci_uhs2_set_power() function. Updates in V13: - Drop use vmmc2. - Modify comment message. Updates in V10: - Move some definitions of PatchV9[05/23] to PatchV10[11/23]. Updates in V9: - Modify annotations in sdhci_get_vdd_value(). Updates in V8: - Adjust the position of matching brackets. - Add the initial value of the pwr in sdhci_uhs2_set_power(). Updates in V7: - Add clear the power reg before setting a new value in sdhci_uhs2_set_power(). - Add MMC_VDD_34_35 case and MMC_VDD_35_36 case in sdhci_get_vdd_value(). - Drop pwr variable in sdhci_get_vdd_value(). Updates in V6: - Add mmc_opt_regulator_set_ocr(). - Remove unnecessary functions. --- drivers/mmc/host/sdhci-uhs2.c | 49 ++++++++++++++++++++++++++++ drivers/mmc/host/sdhci-uhs2.h | 1 + drivers/mmc/host/sdhci.c | 61 +++++++++++++++++++---------------- drivers/mmc/host/sdhci.h | 1 + 4 files changed, 84 insertions(+), 28 deletions(-) diff --git a/drivers/mmc/host/sdhci-uhs2.c b/drivers/mmc/host/sdhci-uhs2.c index 3d16f1ef9344..0cfe9a3f91f7 100644 --- a/drivers/mmc/host/sdhci-uhs2.c +++ b/drivers/mmc/host/sdhci-uhs2.c @@ -59,6 +59,13 @@ EXPORT_SYMBOL_GPL(sdhci_uhs2_dump_regs); * * \*****************************************************************************/ +static inline int mmc_opt_regulator_set_ocr(struct mmc_host *mmc, + struct regulator *supply, + unsigned short vdd_bit) +{ + return IS_ERR_OR_NULL(supply) ? 0 : mmc_regulator_set_ocr(mmc, supply, vdd_bit); +} + /** * sdhci_uhs2_reset - invoke SW reset * @host: SDHCI host @@ -86,6 +93,48 @@ void sdhci_uhs2_reset(struct sdhci_host *host, u16 mask) } EXPORT_SYMBOL_GPL(sdhci_uhs2_reset); +void sdhci_uhs2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd) +{ + struct mmc_host *mmc = host->mmc; + u8 pwr = 0; + + if (mode != MMC_POWER_OFF) { + pwr = sdhci_get_vdd_value(vdd); + if (!pwr) + WARN(1, "%s: Invalid vdd %#x\n", + mmc_hostname(host->mmc), vdd); + pwr |= SDHCI_VDD2_POWER_180; + } + + if (host->pwr == pwr) + return; + host->pwr = pwr; + + if (pwr == 0) { + sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); + + mmc_opt_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); + mmc_regulator_set_vqmmc2(mmc, &mmc->ios); + } else { + mmc_opt_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); + /* support 1.8v only for now */ + mmc_regulator_set_vqmmc2(mmc, &mmc->ios); + + /* Clear the power reg before setting a new value */ + sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); + + /* vdd first */ + pwr |= SDHCI_POWER_ON; + sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL); + mdelay(5); + + pwr |= SDHCI_VDD2_POWER_ON; + sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); + mdelay(5); + } +} +EXPORT_SYMBOL_GPL(sdhci_uhs2_set_power); + /*****************************************************************************\ * * * Driver init/exit * diff --git a/drivers/mmc/host/sdhci-uhs2.h b/drivers/mmc/host/sdhci-uhs2.h index caaf9fba4975..3efa8dd690bf 100644 --- a/drivers/mmc/host/sdhci-uhs2.h +++ b/drivers/mmc/host/sdhci-uhs2.h @@ -178,5 +178,6 @@ struct sdhci_host; void sdhci_uhs2_dump_regs(struct sdhci_host *host); void sdhci_uhs2_reset(struct sdhci_host *host, u16 mask); +void sdhci_uhs2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd); #endif /* __SDHCI_UHS2_H */ diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 5a5fe3528bb4..366c3d30dba6 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -23,7 +23,7 @@ #include #include #include - +#include #include #include @@ -2061,41 +2061,46 @@ static void sdhci_set_power_reg(struct sdhci_host *host, unsigned char mode, sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); } +unsigned short sdhci_get_vdd_value(unsigned short vdd) +{ + switch (1 << vdd) { + case MMC_VDD_165_195: + /* + * Without a regulator, SDHCI does not support 2.0v + * so we only get here if the driver deliberately + * added the 2.0v range to ocr_avail. Map it to 1.8v + * for the purpose of turning on the power. + */ + case MMC_VDD_20_21: + return SDHCI_POWER_180; + case MMC_VDD_29_30: + case MMC_VDD_30_31: + return SDHCI_POWER_300; + case MMC_VDD_32_33: + case MMC_VDD_33_34: + /* + * 3.4V ~ 3.6V are valid only for those platforms where it's + * known that the voltage range is supported by hardware. + */ + case MMC_VDD_34_35: + case MMC_VDD_35_36: + return SDHCI_POWER_330; + default: + return 0; + } +} +EXPORT_SYMBOL_GPL(sdhci_get_vdd_value); + void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, unsigned short vdd) { u8 pwr = 0; if (mode != MMC_POWER_OFF) { - switch (1 << vdd) { - case MMC_VDD_165_195: - /* - * Without a regulator, SDHCI does not support 2.0v - * so we only get here if the driver deliberately - * added the 2.0v range to ocr_avail. Map it to 1.8v - * for the purpose of turning on the power. - */ - case MMC_VDD_20_21: - pwr = SDHCI_POWER_180; - break; - case MMC_VDD_29_30: - case MMC_VDD_30_31: - pwr = SDHCI_POWER_300; - break; - case MMC_VDD_32_33: - case MMC_VDD_33_34: - /* - * 3.4 ~ 3.6V are valid only for those platforms where it's - * known that the voltage range is supported by hardware. - */ - case MMC_VDD_34_35: - case MMC_VDD_35_36: - pwr = SDHCI_POWER_330; - break; - default: + pwr = sdhci_get_vdd_value(vdd); + if (!pwr) { WARN(1, "%s: Invalid vdd %#x\n", mmc_hostname(host->mmc), vdd); - break; } } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 66ab90bd4017..0f78708d0c70 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -836,6 +836,7 @@ void sdhci_set_power(struct sdhci_host *host, unsigned char mode, void sdhci_set_power_and_bus_voltage(struct sdhci_host *host, unsigned char mode, unsigned short vdd); +unsigned short sdhci_get_vdd_value(unsigned short vdd); void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode, unsigned short vdd); int sdhci_get_cd_nogpio(struct mmc_host *mmc);