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Mon, 6 May 2024 15:52:26 -0700 From: Krishna Yarlagadda To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH 04/11] i2c: dt-bindings: configuration settings Date: Tue, 7 May 2024 04:21:32 +0530 Message-ID: <20240506225139.57647-5-kyarlagadda@nvidia.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240506225139.57647-1-kyarlagadda@nvidia.com> References: <20240506225139.57647-1-kyarlagadda@nvidia.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3E:EE_|BL1PR12MB5778:EE_ X-MS-Office365-Filtering-Correlation-Id: 113ae663-9164-4d22-ad13-08dc6e1f40c8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|7416005|1800799015|36860700004|376005|82310400017; X-Microsoft-Antispam-Message-Info: 3GKQlyi5zygDAMfsLwYxjJXWqBhPAoLXyai2o7BuE3Q15MT0JUKrumx7kVQuts8MEGuGz4FeCaENDoilg++nH/DaNu6hS7kdYUDVcTRCAFGlb6rncRqSn5vuhoAaBy8wmJ5hIZNTQbmW078TjwxWhBijPB9vy28Jc4/ucfj+QRByBAYaZMl0eFErBx+HfhEsqVJMKJb3VsxbscIkeWKK/ssrTa6YQI/K3HOuH9E3DP0qC+bNGYxf41XfsFStAVtLamIP1eB28AWkIrcxRNDLq5UIb9Td2j8SpJJe6Pan6wNIMWmZL1oT/7KfL386GHvSsMCYI9WNkDnzxkEaKzX7VwiEuuabmXjb56Rtzvtw1x4+atKj/mix1OShnXX7mvn4nPO3xAj6KZgUXFQqBA4DdhEOvflBmGR5e1xBIhdlP90sBqCrd4v3KPA9rpku1A1M8VCiL02cRI3z+xnaVyhoMoNjcTDJq4UcEXoAhdHudQeEfRsDPmpJPjsLwdcmx4+UjzFq/3YDOdM0dDU4au3oTQRVcWLFAlEeHYt51Usf+1ZLfAlI+XlK1TXnOe9Qj7CMlM56XRQvpDk0DtCh1nVby4crv3iq+0NRMuj0KJI7YlwnhRnEozoMunaYq1LktW8VtuDlLrz6E5p0GSGFudMd7N9o9UcRPbC8YqUPwkSjH0PpLcM0XhTaBmGmNcNgFNvRQeVetVqhNFQ373PLMUQzFmY4RQHjtbGR5YHyltZPmzf6q+Y7tklFxO6bhLnKCAXPzBkiC1A/b3P+3n6+xlMJZSy6vSs0ywmJe4pyc1+nM8BSwswti7Y9z9s2fNOAUdBX8kHmKlrXW4bExPrUrkAZFLecuDfyACJQAzRM9FMZcig5rLdkQJVaUXXEpZ9m70wa8yQyjoWUHGHpG8q33W9RDhXMCrgVb6hhkju1Y5J3x43VDJn4MZQ/RcKxNT3Tog5+r5XjxbDkKfpDpDdspQEzvXl0dmJX1A4L3hPCL0aMgpgRdzAFuBjW+y2EM/celQbOGkwXc4v6gHwm01BI84cCgGhzpdS6tbgUxGhT4KVOBjLLNePb7BqyW5Agb1NFZw/LQ38FZgM8JqHoXXhpw8BhD/V2Mve3iAQJjBR1Yg9SRMx8C7/udbSiLD3ijJqp0WA0ohnpi0I/lOpAck9Pp/nCMs7kvd95oLxAipzRG7ZnJ/waO3PnUwjs8tH8+v7jqd45yf605YxAFbvRqYEVuiWomi/eB7Daz5kWvbMZf/t9s7rkgIdOVUPKLNmu60W3OlQAQO7fknG5Hlsu1RhSVaPQhqW4siSwXUnY7NtHbgc3vQ7ASihBBhhtmTvYS1hLSJhC+oGrSCoHfRP4T9YjOSXjGfD6cdPw9YqkGsLE4menzbk= X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230031)(7416005)(1800799015)(36860700004)(376005)(82310400017); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2024 22:52:48.8296 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 113ae663-9164-4d22-ad13-08dc6e1f40c8 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5778 I2C interface timing registers are configured using config setting framework. Document available properties for Tegra I2C controllers. Signed-off-by: Krishna Yarlagadda --- .../bindings/i2c/nvidia,tegra20-i2c.yaml | 104 ++++++++++++++++++ 1 file changed, 104 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml index 424a4fc218b6..3b22e75e5aa0 100644 --- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml @@ -119,6 +119,96 @@ properties: - const: rx - const: tx + config: + description: Config settings for I2C devices enlisted with I2C controller. + Config setting is the configuration based on chip/board/system + characterization on interface/controller settings. This is needed for + - making the controller internal configuration to better perform + - making the interface to work proper by setting drive strength, slew + rates etc + - making the low power leakage. + There are two types of recommended configuration settings + - Controller register specific for internal operation of controller. + - Pad control/Pinmux/pincontrol registers for interfacing. + These configurations can further be categorized as static and dynamic. + - Static config does not change until a controller is reset. + - Dynamic config changes based on mode or condition, controller is + operating in. + I2C has configuration based on clock speed and has below modes. + - common is set on all speeds and can be overridden by speed mode. + - high is set when clock mode is high speed. + - fastplus is set when clock mode is fast plus. + - fast is set when clock mode is fast mode. + - standard is set when clock mode is standard mode. + $ref: /schemas/misc/nvidia,tegra-config-settings.yaml + unevaluatedProperties: false + properties: + nvidia,i2c-clk-divisor-hs-mode: + description: I2C clock divisor for HS mode. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-clk-divisor-fs-mode: + description: I2C clock divisor for FS mode. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-hs-sclk-high-period: + description: I2C high speed sclk high period. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-hs-sclk-low-period: + description: I2C high speed sclk low period. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-hs-stop-setup-time: + description: I2C high speed stop setup time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-hs-start-hold-time: + description: I2C high speed start hold time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-hs-start-setup-time: + description: I2C high speed start setup time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-sclk-high-period: + description: I2C sclk high period. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-sclk-low-period: + description: I2C sclk low period. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-bus-free-time: + description: I2C bus free time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-stop-setup-time: + description: I2C stop setup time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-start-hold-time: + description: I2C start hold time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + nvidia,i2c-start-setup-time: + description: I2C start setup time. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 0xffff + allOf: - $ref: /schemas/i2c/i2c-controller.yaml - if: @@ -189,4 +279,18 @@ examples: #address-cells = <1>; #size-cells = <0>; + config { + common { + nvidia,i2c-hs-sclk-high-period = <0x03>; + nvidia,i2c-hs-sclk-low-period = <0x08>; + }; + fast { + nvidia,i2c-clk-divisor-fs-mode = <0x3c>; + nvidia,i2c-sclk-high-period = <0x02>; + }; + fastplus { + nvidia,i2c-clk-divisor-fs-mode = <0x4f>; + nvidia,i2c-sclk-high-period = <0x07>; + }; + }; };