From patchwork Tue Nov 28 07:01:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Axe Yang X-Patchwork-Id: 747989 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="aOBae1mV" Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 964041BB; Mon, 27 Nov 2023 23:01:49 -0800 (PST) X-UUID: fbcee76e8dbb11ee8051498923ad61e6-20231128 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=1kILKxh9E79r7aDOclLB0+1y/1FG780xXk0u2JGX8Ho=; b=aOBae1mV0+QXRvn1HS+GiRv1oRfapxE2fs9q/FNHCXGt2B+4aXW2xPB77N1tKNBq9BJsQUaiJg/qoSs+XR1XPy2eMGhgezLCy11gt6VU1cI9kU5iiy8OVgxf+QxN/vvLEpanyV8CKr800IGxpCGes8yKsrgL5mj7ND0c3INXw5o=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.34, REQID:c141affd-8cca-4e75-bb17-1214b96e14f5, IP:0, U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:abefa75, CLOUDID:a603e595-10ce-4e4b-85c2-c9b5229ff92b, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: fbcee76e8dbb11ee8051498923ad61e6-20231128 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1935702585; Tue, 28 Nov 2023 15:01:41 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 28 Nov 2023 15:01:41 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 28 Nov 2023 15:01:40 +0800 From: Axe Yang To: Chaotian Jing , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Wenbin Mei CC: , , , , , , Axe Yang Subject: [PATCH v2 1/2] dt-bindings: mmc: mtk-sd: add tuning steps related property Date: Tue, 28 Nov 2023 15:01:26 +0800 Message-ID: <20231128070127.27442-2-axe.yang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231128070127.27442-1-axe.yang@mediatek.com> References: <20231128070127.27442-1-axe.yang@mediatek.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Add 'mediatek,tuning-steps' setting. This property will give MSDC a chance to extend tuning steps up to 64. With more tuning steps, MSDC may achieve a more optimal calibration result, thus avoiding potential CRC issues. Signed-off-by: Axe Yang Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index 3fffa467e4e1..c532ec92d2d9 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -145,6 +145,15 @@ properties: minimum: 0 maximum: 7 + mediatek,tuning-step: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Some SoCs need extend tuning step for better delay value to avoid CRC issue. + If not present, default tuning step is 32. For eMMC and SD, this can yield + satisfactory calibration results in most cases. + enum: [32, 64] + default: 32 + resets: maxItems: 1