From patchwork Wed Nov 1 07:38:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 741009 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBB41C4332F for ; Wed, 1 Nov 2023 07:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231481AbjKAHjE (ORCPT ); Wed, 1 Nov 2023 03:39:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54666 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231546AbjKAHjC (ORCPT ); Wed, 1 Nov 2023 03:39:02 -0400 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66C19F1; Wed, 1 Nov 2023 00:38:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1698824336; x=1730360336; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cUiL60Q4g/FFeKGo5RkMz2YZaR7uRt/yFxzYNEjO4gA=; b=HFMC2EjyhNFdp6DvAAJJNhT9T5VA8pjN30dI8XYcFTARdvBxSiC6T1Rt S1/LzCcPBKWfNMs7HNrhwjZ3Kh6eBFobtN/pC33fPGLPC4t6OJifmfXfc R9J0r8u8I69PncfIEbAQBd8q6wwxngXtTJvYbtqqpoH/WFRk8GyxX5zV/ hFDTAt12dIowltk7xx36uOFL4qESbCnBFu9u9Xk5sBKs2jV5NrJpiHQJ2 Q69GtM0fSQFXvGn2xlXXlSD5mvSe23BOhQchRuFUD9FsVR7z0aV9r+c5c Z9XZDt89WI1Ji94FUsrmsrJJEB9zRA/2GlZ//UUwtWHmfsD1XeAlhRNZ6 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10880"; a="9982674" X-IronPort-AV: E=Sophos;i="6.03,267,1694761200"; d="scan'208";a="9982674" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2023 00:38:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10880"; a="934357534" X-IronPort-AV: E=Sophos;i="6.03,267,1694761200"; d="scan'208";a="934357534" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.34.17]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Nov 2023 00:38:49 -0700 From: Adrian Hunter To: Ulf Hansson , =?utf-8?q?Kornel_Dul=C4=99ba?= , Radoslaw Biernacki , Gwendal Grignou , Ritesh Harjani , Asutosh Das Cc: Chaotian Jing , Aswath Govindraju , Bhavya Kapoor , Kamal Dasu , Al Cooper , Haibo Chen , Bhupesh Sharma , Shaik Sajida Bhanu , Sai Krishna Potthuri , Swati Agarwal , Victor Shih , Ben Chuang , Thierry Reding , Aniruddha Tvs Rao , Chun-Hung Wu , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] mmc: cqhci: Increase recovery halt timeout Date: Wed, 1 Nov 2023 09:38:24 +0200 Message-Id: <20231101073827.4772-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231101073827.4772-1-adrian.hunter@intel.com> References: <20231101073827.4772-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Failing to halt complicates the recovery. Additionally, unless the card or controller are stuck, which is expected to be very rare, then the halt should succeed, so it is better to wait. Set a large timeout. Fixes: a4080225f51d ("mmc: cqhci: support for command queue enabled host") Cc: stable@vger.kernel.org Signed-off-by: Adrian Hunter --- drivers/mmc/host/cqhci-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/cqhci-core.c b/drivers/mmc/host/cqhci-core.c index b3d7d6d8d654..15f5a069af1f 100644 --- a/drivers/mmc/host/cqhci-core.c +++ b/drivers/mmc/host/cqhci-core.c @@ -984,10 +984,10 @@ static bool cqhci_halt(struct mmc_host *mmc, unsigned int timeout) /* * After halting we expect to be able to use the command line. We interpret the * failure to halt to mean the data lines might still be in use (and the upper - * layers will need to send a STOP command), so we set the timeout based on a - * generous command timeout. + * layers will need to send a STOP command), however failing to halt complicates + * the recovery, so set a timeout that would reasonably allow I/O to complete. */ -#define CQHCI_START_HALT_TIMEOUT 5 +#define CQHCI_START_HALT_TIMEOUT 500 static void cqhci_recovery_start(struct mmc_host *mmc) {