From patchwork Mon Nov 12 14:12:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 150844 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3191005ljp; Mon, 12 Nov 2018 06:13:04 -0800 (PST) X-Google-Smtp-Source: AJdET5d85Nan8z3jlyCKeOwqIcqe+iVhmyXjzTsCNMkHx9Fk75HwsplIGZQnLw7/n7H0/3irNL33 X-Received: by 2002:a65:594b:: with SMTP id g11-v6mr923285pgu.229.1542031984458; Mon, 12 Nov 2018 06:13:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542031984; cv=none; d=google.com; s=arc-20160816; b=KoY8zPwVfwkqOjebL0bmrRqj0ud/l+5b4aqoJonAvs9q7gPWBK+AKMEmeQItViuQTN VErdoyYfW/oH5xIBFjwoRFmzC70i5ocQmwnvAiz8LLnJzlf1jdORzjMl8qVIUcfcwvvN mYHaat7L49F8ZEpn21VdSWe6H/WrY78HuvKYK/Jk3xaKoBsXr+Jp7fIIiHmN2pugeY+H ehEuT4sphhBWzAYBN9wW029vGgdA/qUjN2h1sTROOTGMMYTiFlzV+93+POrMEvLhmzwP fFr9JRCdNN/4pfgh3VstmUGjPZKBbhu8+EN8Snz4EAaufrA8j5aXPu4Kkh3LyTUjXqV3 cV6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=tMawrxzeXIhQY4yuJKEZ15lPPltGf7Hdmj8XRWJ2oNc=; b=Q5I2mwlaWowwaW4p7j9ZWa1Y1gcG+b00/+KlFAudCK6zAh+LIesz144tllb/7DNgXs NH5afUY4vMdPAbtRtGsnX6WsYadK1IVjG5yMjfYEE5h0BIzDpb01ft8C5bGCeEqbOA0f tk0Ksc3E7J2skbWyLLuXlJrJRxy4apJe/gqkZse6wAnypSLRk6Aeha5d93SsQ6EFT6dx /CAhlgpyeN8LQpv5MxJQJblrp55ILi8yqEvHp6mv0lmXcTGoxWmkWJd2yEUfQ7JbjqXe eOdk1x6lA95iCoCKnaZtinualc6Ka1xjFvf6AR2BwuioHTi4IpkRe97jB/Hm62ameF1a g2Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eGVFEriy; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h68-v6si19277640pfb.142.2018.11.12.06.13.04; Mon, 12 Nov 2018 06:13:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eGVFEriy; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727103AbeKMAGa (ORCPT + 5 others); Mon, 12 Nov 2018 19:06:30 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:42465 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729649AbeKMAG3 (ORCPT ); Mon, 12 Nov 2018 19:06:29 -0500 Received: by mail-lf1-f67.google.com with SMTP id l10so2652432lfh.9 for ; Mon, 12 Nov 2018 06:13:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tMawrxzeXIhQY4yuJKEZ15lPPltGf7Hdmj8XRWJ2oNc=; b=eGVFEriyWv2bwZgfSP6Q3/a5ffhzo6Fqbxkd++YSO4koSofLKgs2B774QujiOC+dxe 2HJ84vhJGcRtK9PvfNrjrmGrV+haO8WAp5G3xvdwWof5nDVC+IDeh/0wdv+HxKAnckgZ AnvsoOTsx0ibfzqDZZQ+RceI61ScnaKOx+cq0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tMawrxzeXIhQY4yuJKEZ15lPPltGf7Hdmj8XRWJ2oNc=; b=DEM7mGKADGv+Q+M0HkryM4ZuvMf+ClRlaeO8F7GmKEYfLJSY9hLEV6Gn3zJ3MdrDvt K8A+YEc2v1J7PGAkZIoRlAYA8Z/Vf03RUUU8gJCYz73NrTIq6oq6+2SIHVMJiClHUKyD MG5xv43k5LOKPYolrCfWIVAQygRdyRbye45KvDEtE2rgzg+mTo3duEz1yuLH17XB3Xc5 4dHxhYS6XUouuG0sxnGfT5fBEKNybRK8iON0jwx8an0sLb80WPnthKSNMv5K+ggTLiXo H9twdDf02WOZCenlqI+Hk9rJJzlmPh6UOkFLPidVVeWb1E/JyqxuxOXSQAQTj3eDxyHo 54jQ== X-Gm-Message-State: AGRZ1gJ45YUwG7bNwVJuZczVAvj6FSHbNnQ7VvxMm64U3HlNrtPxJIv0 WrmkE+QjqMbjINFlLR3LRAJsgLsROY+gpg== X-Received: by 2002:a19:a7c1:: with SMTP id q184mr712928lfe.4.1542031980573; Mon, 12 Nov 2018 06:13:00 -0800 (PST) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id m14-v6sm3056889lji.29.2018.11.12.06.12.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Nov 2018 06:12:59 -0800 (PST) From: Linus Walleij To: linux-mmc@vger.kernel.org, Ulf Hansson Cc: Linus Walleij , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Bartosz Golaszewski Subject: [PATCH 06/10] mmc: sdhci: imx: Use the slot GPIO descriptor Date: Mon, 12 Nov 2018 15:12:35 +0100 Message-Id: <20181112141239.19646-7-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181112141239.19646-1-linus.walleij@linaro.org> References: <20181112141239.19646-1-linus.walleij@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Simplify things by making the i.MX SDHCI driver just use slot GPIO with descriptors instead of passing around the global GPIO numbers that we want to get rid of. As it turns out, just one single board is using the platform data to pass in GPIOs numbers for CD and WP, so we augment this to use a machine descriptor table instead. Cc: Shawn Guo Cc: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: Bartosz Golaszewski Signed-off-by: Linus Walleij --- This very much needs to be tested on the PCM043. If it works fine, it also opens the way for switching more i.MX boardfiles to using machine GPIO descriptor tables. --- arch/arm/mach-imx/mach-pcm043.c | 17 +++++++++++++---- drivers/mmc/host/sdhci-esdhc-imx.c | 14 ++++++++------ include/linux/platform_data/mmc-esdhc-imx.h | 4 ---- 3 files changed, 21 insertions(+), 14 deletions(-) -- 2.17.2 Reviewed-by: Dong Aisheng diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index e595e5368676..46ba3348e8f0 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -214,8 +215,6 @@ static const iomux_v3_cfg_t pcm043_pads[] __initconst = { #define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31) #define AC97_GPIO_TXD IMX_GPIO_NR(2, 28) #define AC97_GPIO_RESET IMX_GPIO_NR(2, 0) -#define SD1_GPIO_WP IMX_GPIO_NR(2, 23) -#define SD1_GPIO_CD IMX_GPIO_NR(2, 24) static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97) { @@ -341,12 +340,21 @@ static int __init pcm043_otg_mode(char *options) __setup("otg_mode=", pcm043_otg_mode); static struct esdhc_platform_data sd1_pdata = { - .wp_gpio = SD1_GPIO_WP, - .cd_gpio = SD1_GPIO_CD, .wp_type = ESDHC_WP_GPIO, .cd_type = ESDHC_CD_GPIO, }; +static struct gpiod_lookup_table sd1_gpio_table = { + .dev_id = "sdhci-esdhc-imx35.0", + .table = { + /* Card detect: bank 2 offset 24 */ + GPIO_LOOKUP("imx35-gpio.2", 24, "cd", GPIO_ACTIVE_LOW), + /* Write protect: bank 2 offset 23 */ + GPIO_LOOKUP("imx35-gpio.2", 23, "wp", GPIO_ACTIVE_LOW), + { }, + }, +}; + /* * Board specific initialization. */ @@ -391,6 +399,7 @@ static void __init pcm043_late_init(void) { imx35_add_imx_ssi(0, &pcm043_ssi_pdata); + gpiod_add_lookup_table(&sd1_gpio_table); imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); } diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index f44e49014a44..982d2a9866dc 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -21,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -1139,8 +1137,12 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, if (of_get_property(np, "fsl,wp-controller", NULL)) boarddata->wp_type = ESDHC_WP_CONTROLLER; - boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); - if (gpio_is_valid(boarddata->wp_gpio)) + /* + * If we have this property, then activate WP check. + * Retrieveing and requesting the actual WP GPIO will happen + * in the call to mmc_of_parse(). + */ + if (of_property_read_bool(np, "wp-gpios")) boarddata->wp_type = ESDHC_WP_GPIO; of_property_read_u32(np, "fsl,tuning-step", &boarddata->tuning_step); @@ -1198,7 +1200,7 @@ static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev, host->mmc->parent->platform_data); /* write_protect */ if (boarddata->wp_type == ESDHC_WP_GPIO) { - err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio); + err = mmc_gpiod_request_ro(host->mmc, "wp", 0, false, 0, NULL); if (err) { dev_err(mmc_dev(host->mmc), "failed to request write-protect gpio!\n"); @@ -1210,7 +1212,7 @@ static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev, /* card_detect */ switch (boarddata->cd_type) { case ESDHC_CD_GPIO: - err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0); + err = mmc_gpiod_request_cd(host->mmc, "cd", 0, false, 0, NULL); if (err) { dev_err(mmc_dev(host->mmc), "failed to request card-detect gpio!\n"); diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h index 640dec8b5b0c..b606ca4197df 100644 --- a/include/linux/platform_data/mmc-esdhc-imx.h +++ b/include/linux/platform_data/mmc-esdhc-imx.h @@ -30,15 +30,11 @@ enum cd_types { * * ESDHC_WP(CD)_CONTROLLER type is not available on i.MX25/35. * - * @wp_gpio: gpio for write_protect - * @cd_gpio: gpio for card_detect interrupt * @wp_type: type of write_protect method (see wp_types enum above) * @cd_type: type of card_detect method (see cd_types enum above) */ struct esdhc_platform_data { - unsigned int wp_gpio; - unsigned int cd_gpio; enum wp_types wp_type; enum cd_types cd_type; int max_bus_width;