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Thu, 21 Jan 2021 03:20:29 +0000 From: peng.fan@nxp.com To: ulf.hansson@linaro.org, robh+dt@kernel.org, shawnguo@kernel.org, adrian.hunter@intel.com Cc: s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: [PATCH V2 3/4] arm64: dts: imx8qxp: correct usdhc clock-names sequence Date: Thu, 21 Jan 2021 11:09:52 +0800 Message-Id: <1611198593-16287-4-git-send-email-peng.fan@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1611198593-16287-1-git-send-email-peng.fan@nxp.com> References: <1611198593-16287-1-git-send-email-peng.fan@nxp.com> X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SGXP274CA0005.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b8::17) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SGXP274CA0005.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b8::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3784.12 via Frontend Transport; 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Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) -- 2.28.0 diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi index e46faac1fe71..1d522de7b017 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi @@ -366,9 +366,9 @@ usdhc1: mmc@5b010000 { interrupts = ; reg = <0x5b010000 0x10000>; clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>; - clock-names = "ipg", "per", "ahb"; + <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>, + <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>; + clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_0>; status = "disabled"; }; @@ -378,9 +378,9 @@ usdhc2: mmc@5b020000 { interrupts = ; reg = <0x5b020000 0x10000>; clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC1_IPG_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>; - clock-names = "ipg", "per", "ahb"; + <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>, + <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>; + clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_1>; fsl,tuning-start-tap = <20>; fsl,tuning-step= <2>; @@ -392,9 +392,9 @@ usdhc3: mmc@5b030000 { interrupts = ; reg = <0x5b030000 0x10000>; clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC2_IPG_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>, - <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>; - clock-names = "ipg", "per", "ahb"; + <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>, + <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>; + clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_2>; status = "disabled"; };