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[209.132.180.67]) by mx.google.com with ESMTP id t62si14420970pfd.133.2016.10.24.02.12.26; Mon, 24 Oct 2016 02:12:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935681AbcJXJMZ (ORCPT + 3 others); Mon, 24 Oct 2016 05:12:25 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:34752 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934500AbcJXJMZ (ORCPT ); Mon, 24 Oct 2016 05:12:25 -0400 Received: by mail-pf0-f173.google.com with SMTP id r16so95437389pfg.1 for ; Mon, 24 Oct 2016 02:12:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cRLqh7xzI6NytzBjl5JZgBVX5Lc0WlasTYstopz+D0c=; b=DzdAKCTZx1XXxKLpLel3Mp8AKEzOON2qVCB4Q7PI6VKYawbboCsclAWuHcKP+7Arw1 bMN+nI3lH/EUoB4rJ0fcl/kfHlvxI7/fA1AXxuAicCF+YI5Iju/R184GI3KJIjI4Csrd 5aDY10G33Eg7hugOrmz2bbUerhhK++xLu7hGE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cRLqh7xzI6NytzBjl5JZgBVX5Lc0WlasTYstopz+D0c=; b=N06FwFES2soQZ0H7pAilDuN04ZvQs7uZPqtHsX1eQd636lhJ09jKyrakaIyKhszzft Qf0tD/6ctt+khVgxWSBPoPgdcUXWrGOuA0Qm/xotU6GAS2RubehtqFDb9y/xrrSpNSDX q6RzSQNoEDdvqDrqGlIg7wZsHEiDGjYqLZ+4PcFnMjPGnxwjZzjPS1BWkGw9GwIRhp2+ RpXwSi4dm1nnAgYCVaW7HLwCg1jZHytKqBLFKQvxGK3OZodupmEa4Di9fZ07h38oXPiA ZUCgWoQaVqVanq/Xgr6rY0Tg1Lm/3X1wqlhqPe6aqz5GMsj7H7kgk+zWBa8ov5+tRMuW Ap3Q== X-Gm-Message-State: ABUngve2TZTBkRJ4/FtcJ0wf0UxSUAklBfm4JtnI1STunA7j902jqjMHkL6JXUyzs8gFLoxk X-Received: by 10.99.103.198 with SMTP id b189mr21932333pgc.81.1477300344396; Mon, 24 Oct 2016 02:12:24 -0700 (PDT) Received: from localhost.localdomain ([188.42.255.214]) by smtp.gmail.com with ESMTPSA id q23sm23464603pfg.95.2016.10.24.02.12.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 24 Oct 2016 02:12:24 -0700 (PDT) From: Jun Nie To: shawn.guo@linaro.org, xie.baoyou@zte.com.cn Cc: ulf.hansson@linaro.org, jh80.chung@samsung.com, jason.liu@linaro.org, linux-mmc@vger.kernel.org, Jun Nie Subject: [PATCH 3/5] Documentation: synopsys-dw-mshc: add binding for fifo quirks Date: Mon, 24 Oct 2016 17:11:54 +0800 Message-Id: <1477300316-1420-4-git-send-email-jun.nie@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477300316-1420-1-git-send-email-jun.nie@linaro.org> References: <1477300316-1420-1-git-send-email-jun.nie@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add fifo-addr-override property and fifo-watermark-quirk property to synopsys-dw-mshc bindings. It is intended to provide workarounds to support more SoCs that break current assumption. See Documentation/devicetree/bindings/reset/reset.txt for details. Signed-off-by: Jun Nie --- Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt index 4e00e85..eb64921 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt @@ -76,6 +76,17 @@ Optional properties: * broken-cd: as documented in mmc core bindings. +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO + reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A) + and 0x200(version >= 0x240A) in some implementation. So this property serves as + workaround. + +* fifo-watermark-quirk: Data done irq is expected if data length is less than + watermark in PIO mode. But fifo watermark is requested to be aligned with data + length in some SoC so that TX/RX irq can be generated with data done irq. Add the + watermark quirk to mark this requirement and force fifo watermark setting + accordingly. + * vmmc-supply: The phandle to the regulator to use for vmmc. If this is specified we'll defer probe until we can find this regulator. @@ -103,6 +114,8 @@ board specific portions as listed below. interrupts = <0 75 0>; #address-cells = <1>; #size-cells = <0>; + fifo-addr-override = <0x200>; + fifo-watermark-quirk; }; [board specific internal DMA resources]