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[209.85.217.174]) by mx.google.com with ESMTPS id o20si5168185laa.83.2015.03.21.07.50.32 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 21 Mar 2015 07:50:32 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) client-ip=209.85.217.174; Received: by lbcgn8 with SMTP id gn8so92949077lbc.2 for ; Sat, 21 Mar 2015 07:50:32 -0700 (PDT) X-Received: by 10.112.55.103 with SMTP id r7mr5085552lbp.29.1426949432011; Sat, 21 Mar 2015 07:50:32 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp626502lbj; Sat, 21 Mar 2015 07:50:31 -0700 (PDT) X-Received: by 10.66.169.137 with SMTP id ae9mr196860522pac.7.1426949430130; Sat, 21 Mar 2015 07:50:30 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id wt5si2696902pbc.214.2015.03.21.07.50.29; Sat, 21 Mar 2015 07:50:30 -0700 (PDT) Received-SPF: none (google.com: linux-mmc-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751445AbbCUOu1 (ORCPT + 3 others); Sat, 21 Mar 2015 10:50:27 -0400 Received: from mail-wi0-f173.google.com ([209.85.212.173]:37119 "EHLO mail-wi0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751394AbbCUOu0 (ORCPT ); Sat, 21 Mar 2015 10:50:26 -0400 Received: by wixw10 with SMTP id w10so15170996wix.0 for ; Sat, 21 Mar 2015 07:50:24 -0700 (PDT) X-Received: by 10.180.103.166 with SMTP id fx6mr4822927wib.4.1426949424897; Sat, 21 Mar 2015 07:50:24 -0700 (PDT) Received: from mms.wifi.mm-sol.com ([37.157.136.206]) by mx.google.com with ESMTPSA id e2sm10879278wjy.46.2015.03.21.07.50.23 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sat, 21 Mar 2015 07:50:24 -0700 (PDT) From: Georgi Djakov To: ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2] mmc: sdhci-msm: Add support for vendor capabilities registers Date: Sat, 21 Mar 2015 16:50:17 +0200 Message-Id: <1426949417-5498-1-git-send-email-georgi.djakov@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-mmc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: georgi.djakov@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Some versions of this controller do not advertise their 3.0v and 8bit bus-width support capabilities. It is required to explicitly set these capabilities for the specific controller versions. Signed-off-by: Georgi Djakov --- Changes since v1: * Converted to separate read, modify, write statements. * Slightly updated comment text. Tested on msm8916-mtp board. drivers/mmc/host/sdhci-msm.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3d32ce896b09..b87f271ede29 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c @@ -41,6 +41,15 @@ #define CORE_VENDOR_SPEC 0x10c #define CORE_CLK_PWRSAVE BIT(1) +#define CORE_MCI_VERSION 0x050 +#define CORE_VERSION_MAJOR_SHIFT 28 +#define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT) +#define CORE_VERSION_MINOR_MASK 0xff + +#define CORE_VENDOR_SPEC_CAPABILITIES0 0x11c +#define CORE_8_BIT_SUPPORT BIT(18) +#define CORE_3_0V_SUPPORT BIT(25) + #define CDR_SELEXT_SHIFT 20 #define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT) #define CMUX_SHIFT_PHASE_SHIFT 24 @@ -426,7 +435,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) struct sdhci_msm_host *msm_host; struct resource *core_memres; int ret; - u16 host_version; + u16 host_version, core_minor; + u32 core_version, caps; + u8 core_major; msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); if (!msm_host) @@ -516,6 +527,24 @@ static int sdhci_msm_probe(struct platform_device *pdev) host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT)); + core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION); + core_major = (core_version & CORE_VERSION_MAJOR_MASK) >> + CORE_VERSION_MAJOR_SHIFT; + core_minor = core_version & CORE_VERSION_MINOR_MASK; + dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n", + core_version, core_major, core_minor); + + /* + * Support for some capabilities is not advertised by newer + * controller versions and must be explicitly enabled. + */ + if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) { + caps = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES); + caps |= CORE_3_0V_SUPPORT | CORE_8_BIT_SUPPORT; + writel_relaxed(caps, host->ioaddr + + CORE_VENDOR_SPEC_CAPABILITIES0); + } + ret = sdhci_add_host(host); if (ret) goto clk_disable;