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[78.145.240.98]) by mx.google.com with ESMTPSA id l9sm8846946wic.21.2014.05.15.02.37.57 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:37:58 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 13/14] mmc: mmci: add qcom specific clk control Date: Thu, 15 May 2014 10:37:56 +0100 Message-Id: <1400146676-30343-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla On Qcom SD card controller, cclk is mclk and mclk should be directly controlled by the driver. This patch adds support to control mclk directly in the driver, and also adds explicit_mclk_control and cclk_is_mclk flags in variant structure giving more flexibility to the driver. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 30 +++++++++++++++++++++++++----- 1 file changed, 25 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index bc7b80d..cf58fec1 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -75,6 +75,8 @@ static unsigned int fmax = 515633; * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply * @mclk_delayed_writes: enable delayed writes to ensure, subsequent updates * are not ignored. + * @explicit_mclk_control: enable explicit mclk control in driver. + * @qcom_cclk_is_mclk: enable iff card clock is multimedia card adapter clock. */ struct variant_data { unsigned int clkreg; @@ -97,6 +99,8 @@ struct variant_data { bool busy_detect; bool pwrreg_nopower; bool mclk_delayed_writes; + bool explicit_mclk_control; + bool qcom_cclk_is_mclk; }; static struct variant_data variant_arm = { @@ -205,6 +209,8 @@ static struct variant_data variant_qcom = { * for 3 clk cycles. */ .mclk_delayed_writes = true, + .explicit_mclk_control = true, + .qcom_cclk_is_mclk = true, }; static inline u32 mmci_readl(struct mmci_host *host, u32 off) @@ -320,7 +326,9 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) host->cclk = 0; if (desired) { - if (desired >= host->mclk) { + if (variant->qcom_cclk_is_mclk) { + host->cclk = host->mclk; + } else if (desired >= host->mclk) { clk = MCI_CLK_BYPASS; if (variant->st_clkdiv) clk |= MCI_ST_UX500_NEG_EDGE; @@ -1358,6 +1366,16 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) if (!ios->clock && variant->pwrreg_clkgate) pwr &= ~MCI_PWR_ON; + if (ios->clock != host->mclk && host->variant->explicit_mclk_control) { + int rc = clk_set_rate(host->clk, ios->clock); + if (rc < 0) { + dev_err(mmc_dev(host->mmc), + "Error setting clock rate (%d)\n", rc); + } else { + host->mclk = clk_get_rate(host->clk); + } + } + spin_lock_irqsave(&host->lock, flags); mmci_set_clkreg(host, ios->clock); @@ -1544,10 +1562,12 @@ static int mmci_probe(struct amba_device *dev, * is not specified. Either value must not exceed the clock rate into * the block, of course. */ - if (mmc->f_max) - mmc->f_max = min(host->mclk, mmc->f_max); - else - mmc->f_max = min(host->mclk, fmax); + if (!host->variant->explicit_mclk_control) { + if (mmc->f_max) + mmc->f_max = min(host->mclk, mmc->f_max); + else + mmc->f_max = min(host->mclk, fmax); + } dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); /* Get regulators and the supported OCR mask */