From patchwork Thu May 15 09:37:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 30236 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ob0-f199.google.com (mail-ob0-f199.google.com [209.85.214.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 1489520446 for ; Thu, 15 May 2014 09:37:54 +0000 (UTC) Received: by mail-ob0-f199.google.com with SMTP id wm4sf4130524obc.6 for ; Thu, 15 May 2014 02:37:54 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=aHYxq0J1Z6Uiv99lbtpmvBK5sUQYbEb64DKxDgSQFfI=; b=LMmvbpKLzq0oWSuEYtd1rN8t+gbY2i/8msZaVa++M6oAOoOXUy1uUk38YWSLY166Sr IAJWskKhJzWxr3lCFE076xR6Obdqc8VexBl9aP5ZpGrvQoCLRi1TzV5pExS/D5jtRhID t+KQQKe0LfCV9k5QN0DkzrIEnHhuqCxzhi9VM5YNjpHRbkubUa2OE7u7wF5yCPag93i0 yrEOPe+tXeMpxFtWYhd5vIQFNLtIXpNeELyEhJF9jXNHfOyw4mbGyNbEBM0mnktiQR/w AoZmTg1ExeRhlCjjPilPuzmuY6xbcsaV2NOmHMwIAGU72GZ46fO7fXGsZNHElgLl/ZqF Hmvg== X-Gm-Message-State: ALoCoQlR23yFtt+YYoSO/Rm6+Y1Si0PxphneITLxiTcUyMPNt6o39WAayryGZ5IKy9W12fqH5MIn X-Received: by 10.50.70.66 with SMTP id k2mr20457655igu.7.1400146674644; Thu, 15 May 2014 02:37:54 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.40.74 with SMTP id w68ls165225qgw.53.gmail; Thu, 15 May 2014 02:37:54 -0700 (PDT) X-Received: by 10.52.22.13 with SMTP id z13mr6547570vde.10.1400146674398; Thu, 15 May 2014 02:37:54 -0700 (PDT) Received: from mail-ve0-f171.google.com (mail-ve0-f171.google.com [209.85.128.171]) by mx.google.com with ESMTPS id sg6si834550vdc.81.2014.05.15.02.37.54 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 15 May 2014 02:37:54 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.171 as permitted sender) client-ip=209.85.128.171; Received: by mail-ve0-f171.google.com with SMTP id oz11so934106veb.2 for ; Thu, 15 May 2014 02:37:54 -0700 (PDT) X-Received: by 10.58.126.135 with SMTP id my7mr7855903veb.27.1400146674309; Thu, 15 May 2014 02:37:54 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp307876vcb; Thu, 15 May 2014 02:37:53 -0700 (PDT) X-Received: by 10.68.231.35 with SMTP id td3mr10849930pbc.137.1400146673525; Thu, 15 May 2014 02:37:53 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ko6si2407326pbc.98.2014.05.15.02.37.52; Thu, 15 May 2014 02:37:52 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754777AbaEOJhj (ORCPT + 27 others); Thu, 15 May 2014 05:37:39 -0400 Received: from mail-wg0-f52.google.com ([74.125.82.52]:39640 "EHLO mail-wg0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754426AbaEOJhf (ORCPT ); Thu, 15 May 2014 05:37:35 -0400 Received: by mail-wg0-f52.google.com with SMTP id l18so3110610wgh.23 for ; Thu, 15 May 2014 02:37:34 -0700 (PDT) X-Received: by 10.180.8.66 with SMTP id p2mr30476928wia.37.1400146654305; Thu, 15 May 2014 02:37:34 -0700 (PDT) Received: from srini-ThinkPad-X1-Carbon-2nd.dlink.com (host-78-145-240-98.as13285.net. [78.145.240.98]) by mx.google.com with ESMTPSA id be3sm6071373wjc.5.2014.05.15.02.37.32 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 May 2014 02:37:33 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , Ulf Hansson , linux-mmc@vger.kernel.org Cc: Chris Ball , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas Kandagatla Subject: [PATCH v2 10/14] mmc: mmci: add Qcom specifics of clk and datactrl registers. Date: Thu, 15 May 2014 10:37:31 +0100 Message-Id: <1400146651-30220-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1400146447-29803-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla This patch adds specifics of clk and datactrl register on Qualcomm SD Card controller. This patch also populates the Qcom variant data with these new values specific to Qualcomm SD Card Controller. Signed-off-by: Srinivas Kandagatla Reviewed-by: Linus Walleij --- drivers/mmc/host/mmci.c | 3 +++ drivers/mmc/host/mmci.h | 24 ++++++++++++++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 17e7f6a..0a0fc22 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -185,6 +185,9 @@ static struct variant_data variant_qcom = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, .clkreg = MCI_CLK_ENABLE, + .clkreg_enable = MCI_QCOM_CLK_FLOWENA, + .clkreg_8bit_bus_enable = MCI_QCOM_CLK_WIDEBUS_8, + .datactrl_mask_ddrmode = MCI_QCOM_CLK_DDR_MODE, .blksz_datactrl4 = true, .datalength_bits = 24, .blksz_datactrl4 = true, diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index cd83ca3..1b93ae7 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -41,6 +41,22 @@ /* Modified PL180 on Versatile Express platform */ #define MCI_ARM_HWFCEN BIT(12) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CLK_WIDEBUS_4 (2 << 10) +#define MCI_QCOM_CLK_WIDEBUS_8 (3 << 10) +#define MCI_QCOM_CLK_FLOWENA BIT(12) +#define MCI_QCOM_CLK_INVERTOUT BIT(13) + +/* select in latch data and command */ +#define MCI_QCOM_CLK_SEL_IN_SHIFT (14) +#define MCI_QCOM_CLK_SEL_MASK (0x3) +#define MCI_QCOM_CLK_SEL_RISING_EDGE (1) +#define MCI_QCOM_CLK_FEEDBACK_CLK (2 << 14) +#define MCI_QCOM_CLK_DDR_MODE (3 << 14) + +/* mclk selection */ +#define MCI_QCOM_CLK_SEL_MCLK (2 << 23) + #define MMCIARGUMENT 0x008 #define MMCICOMMAND 0x00c #define MCI_CPSM_RESPONSE BIT(6) @@ -54,6 +70,14 @@ #define MCI_ST_NIEN BIT(13) #define MCI_ST_CE_ATACMD BIT(14) +/* Modified on Qualcomm Integrations */ +#define MCI_QCOM_CSPM_DATCMD BIT(12) +#define MCI_QCOM_CSPM_MCIABORT BIT(13) +#define MCI_QCOM_CSPM_CCSENABLE BIT(14) +#define MCI_QCOM_CSPM_CCSDISABLE BIT(15) +#define MCI_QCOM_CSPM_AUTO_CMD19 BIT(16) +#define MCI_QCOM_CSPM_AUTO_CMD21 BIT(21) + #define MMCIRESPCMD 0x010 #define MMCIRESPONSE0 0x014 #define MMCIRESPONSE1 0x018