From patchwork Wed Dec 12 14:59:08 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 13511 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id B584023E27 for ; Wed, 12 Dec 2012 14:59:45 +0000 (UTC) Received: from mail-ie0-f172.google.com (mail-ie0-f172.google.com [209.85.223.172]) by fiordland.canonical.com (Postfix) with ESMTP id 39E5DA18B18 for ; Wed, 12 Dec 2012 14:59:45 +0000 (UTC) Received: by mail-ie0-f172.google.com with SMTP id c13so1966146ieb.17 for ; Wed, 12 Dec 2012 06:59:44 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:mime-version:content-type :x-gm-message-state; bh=K2OOHk1sN8IUkIy+bNaW2o0Rqo3Vsybeq+Hc/echkLg=; b=Jtyag6OWMd9p2Apdao9+lLP0Ze8NsbvFd4Pq/jnm2C4iE/508jKTZOy+8cIjMxzWX6 baVRtWDcJ82YqyelqmkKaAIGCDoE7YPBJgzQkKgj2ugnlXDU0S8bxBaJ+iwcw8dv2EdK vx9Cuss4cZBApU1+xOLf8uPmvvjVIrn8WaVD19PyFjlUbHI18fguOw1uQhDD0CUsz2CG ww6JOdxoJg7NkPeOOW3TK/58624ERc549rMlgb8/d1Fbf90RpH+dECXU5Xld4RNYbfMG aGWwpcFFIyN5wf3kkXWIkUUx4fhEHy/G9Ftd2sXfMbe+PqNdpKgoWfCOd05BpGUbeYzD msxw== Received: by 10.50.42.168 with SMTP id p8mr13442171igl.57.1355324384521; Wed, 12 Dec 2012 06:59:44 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.50.67.148 with SMTP id n20csp204652igt; Wed, 12 Dec 2012 06:59:43 -0800 (PST) Received: by 10.14.175.133 with SMTP id z5mr3324074eel.15.1355324383118; Wed, 12 Dec 2012 06:59:43 -0800 (PST) Received: from eu1sys200aog102.obsmtp.com (eu1sys200aog102.obsmtp.com [207.126.144.113]) by mx.google.com with SMTP id g47si63857223eep.123.2012.12.12.06.59.30 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 12 Dec 2012 06:59:43 -0800 (PST) Received-SPF: neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) client-ip=207.126.144.113; Authentication-Results: mx.google.com; spf=neutral (google.com: 207.126.144.113 is neither permitted nor denied by best guess record for domain of ulf.hansson@stericsson.com) smtp.mail=ulf.hansson@stericsson.com Received: from beta.dmz-ap.st.com ([138.198.100.35]) (using TLSv1) by eu1sys200aob102.postini.com ([207.126.147.11]) with SMTP ID DSNKUMibx49RpfsQwkKOcyeTCzuz7uTg5AzD@postini.com; Wed, 12 Dec 2012 14:59:41 UTC Received: from zeta.dmz-ap.st.com (ns6.st.com [138.198.234.13]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 8B76014E; Wed, 12 Dec 2012 14:51:01 +0000 (GMT) Received: from relay2.stm.gmessaging.net (unknown [10.230.100.18]) by zeta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D6D52CBC; Wed, 12 Dec 2012 14:59:12 +0000 (GMT) Received: from exdcvycastm004.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm004", Issuer "exdcvycastm004" (not verified)) by relay2.stm.gmessaging.net (Postfix) with ESMTPS id 6A0CBA8065; Wed, 12 Dec 2012 15:59:06 +0100 (CET) Received: from steludxu1397.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.2) with Microsoft SMTP Server (TLS) id 8.3.83.0; Wed, 12 Dec 2012 15:59:11 +0100 From: Ulf Hansson To: , Chris Ball Cc: , Russell King , Linus Walleij , Ulf Hansson Subject: [PATCH] mmc: mmci: Support for DDR mode Date: Wed, 12 Dec 2012 15:59:08 +0100 Message-ID: <1355324348-11481-1-git-send-email-ulf.hansson@stericsson.com> X-Mailer: git-send-email 1.7.10 MIME-Version: 1.0 X-Gm-Message-State: ALoCoQlrdE1URwXJbtfiu6GBHjID+jRfTZhBGZXMmoW1/NCQFQZPRmEdibPA5MQoqoxQq+735/ii From: Ulf Hansson Add support for DDR mode which may be used for the ux500v2 variant. Corresponding capabilities to enable the DDR support must be set in the platform struct to enable the functionality. Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index aa04b42..4e4f5f1 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -202,6 +202,9 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) clk |= MCI_ST_8BIT_BUS; + if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) + clk |= MCI_ST_UX500_NEG_EDGE; + mmci_write_clkreg(host, clk); } @@ -680,6 +683,9 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) mmci_write_clkreg(host, clk); } + if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50) + datactrl |= MCI_ST_DPSM_DDRMODE; + /* * Attempt to use DMA operation mode, if this * should fail, fall back to PIO mode