From patchwork Mon Jul 23 11:16:40 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Girish K S X-Patchwork-Id: 10172 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3BB3824037 for ; Mon, 23 Jul 2012 11:16:59 +0000 (UTC) Received: from mail-gh0-f180.google.com (mail-gh0-f180.google.com [209.85.160.180]) by fiordland.canonical.com (Postfix) with ESMTP id 049D7A1822A for ; Mon, 23 Jul 2012 11:16:58 +0000 (UTC) Received: by ghbz12 with SMTP id z12so5624003ghb.11 for ; Mon, 23 Jul 2012 04:16:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=5MmMEpr1iWOsHBgLlJjrdVr43Zlr0cOfCfxmXhTy7cw=; b=Afnik4LiMKsTj50FCgl7cYEQ4Md0+mjZTw3EqvMcdPZdfC5A3YYJl5qK1eeizR7tSv 8wEJSXmfc8KG/WILpNJcjAGn3LOd4ixum4D7sNCx1RUd+NmoJiXzwUSdjSvX3K05U/O4 8PtNprAgcq4qisSeDRbaXiTfVvJaSJS9ukV+PPxnxF7ql4wPU+7tlYgmIcwf9I3w0gMI hWo2sjrahYY7ynt8j5K5Hc4+nezoIlp+KE2MrYDVk/GOkDFtjd7zYQ/RvDgsVYq6phr6 iWsn2Me1sSeU9lVpXtsnvoND5Rw2aPtWOZZSKZ0YdOo4zgH2oz4JhVNHOH06PKkaofdl tdfQ== Received: by 10.50.17.193 with SMTP id q1mr14028091igd.33.1343042218240; Mon, 23 Jul 2012 04:16:58 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.153.7 with SMTP id i7csp54013ibw; Mon, 23 Jul 2012 04:16:57 -0700 (PDT) Received: by 10.66.78.42 with SMTP id y10mr29989513paw.31.1343042217411; Mon, 23 Jul 2012 04:16:57 -0700 (PDT) Received: from mail-pb0-f50.google.com (mail-pb0-f50.google.com [209.85.160.50]) by mx.google.com with ESMTPS id hw8si22215984pbc.26.2012.07.23.04.16.56 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 Jul 2012 04:16:57 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of girish.shivananjappa@linaro.org) client-ip=209.85.160.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.50 is neither permitted nor denied by best guess record for domain of girish.shivananjappa@linaro.org) smtp.mail=girish.shivananjappa@linaro.org Received: by pbbrr4 with SMTP id rr4so12556810pbb.37 for ; Mon, 23 Jul 2012 04:16:56 -0700 (PDT) Received: by 10.68.195.97 with SMTP id id1mr34878200pbc.91.1343042216449; Mon, 23 Jul 2012 04:16:56 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id ns5sm9791583pbb.26.2012.07.23.04.16.52 (version=SSLv3 cipher=OTHER); Mon, 23 Jul 2012 04:16:55 -0700 (PDT) From: Girish K S To: linux-mmc@vger.kernel.org Cc: cjb@laptop.org, will.newton@imgtec.com, patches@linaro.org, linux-samsung-soc@vger.kernel.org, Girish K S Subject: [PATCH] mmc: dw_mmc: add busmode selection support Date: Mon, 23 Jul 2012 16:46:40 +0530 Message-Id: <1343042200-19524-1-git-send-email-girish.shivananjappa@linaro.org> X-Mailer: git-send-email 1.7.4.1 X-Gm-Message-State: ALoCoQmIx2xrSYGmMmy3Gb7lRMC6Rj+3anNvhvOFCeFHPu8c8S/moSyAdpyuKv4FHn3k9kUK15Wu Synopsis Designware host controller has suppport for open drain mode selection. During the mmc card initialization the host controller can select the open-drain bit to allow the device initialization in the open-drain mode. Once the device enters the standby mode this bit can be reset to enter push-pull mode. Signed-off-by: Girish K S --- drivers/mmc/host/dw_mmc.c | 14 ++++++++++++++ drivers/mmc/host/dw_mmc.h | 1 + 2 files changed, 15 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 72dc3cd..da11e5a 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -773,6 +773,18 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) spin_unlock_bh(&host->lock); } +static void dw_mci_set_busmode(struct dw_mci_slot *slot) +{ + struct mmc_ios *ios = &slot->mmc->ios; + u32 reg; + + reg = mci_readl(slot->host, CTRL); + if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) + mci_writel(slot->host, CTRL, reg | SDMMC_CTRL_ENABLE_OD); + else + mci_writel(slot->host, CTRL, reg & ~SDMMC_CTRL_ENABLE_OD); +} + static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { struct dw_mci_slot *slot = mmc_priv(mmc); @@ -818,6 +830,8 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) default: break; } + + dw_mci_set_busmode(slot); } static int dw_mci_get_ro(struct mmc_host *mmc) diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 15c27e1..1a53fb2 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -67,6 +67,7 @@ /* Control register defines */ #define SDMMC_CTRL_USE_IDMAC BIT(25) +#define SDMMC_CTRL_ENABLE_OD BIT(24) #define SDMMC_CTRL_CEATA_INT_EN BIT(11) #define SDMMC_CTRL_SEND_AS_CCSD BIT(10) #define SDMMC_CTRL_SEND_CCSD BIT(9)