From patchwork Mon Jul 16 08:45:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Girish K S X-Patchwork-Id: 9999 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 5210B23F08 for ; Mon, 16 Jul 2012 08:45:27 +0000 (UTC) Received: from mail-yw0-f52.google.com (mail-yw0-f52.google.com [209.85.213.52]) by fiordland.canonical.com (Postfix) with ESMTP id 07503A1886A for ; Mon, 16 Jul 2012 08:45:26 +0000 (UTC) Received: by yhpp61 with SMTP id p61so5268082yhp.11 for ; Mon, 16 Jul 2012 01:45:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:from:to:cc :subject:date:message-id:x-mailer:x-gm-message-state; bh=fiWmYjcowCoFo+OZyqsfU0fI/36XNjIJAkqgmsDw5uw=; b=mYohVinQLkKybTW6CkrBmFOMKrkD29NEH7lAO0oBLOxmajUJvmCaD0ZORl8LS53s/u lQRPPIXiwWjJA/Ua/sg4ziBGUYSAQ9ThXqoNjOCWXNy1YStgzrIVox5ytjaVUEQ8O3nf +H3/QAZJPYbNvhxyC6+kCSbgqaD0KxY3OKLjL9YnFz52uAkx3MNapXPXMcggBL0W6o/y 7KMa/j5gfkl4Tw2zI6oFEe8kIRA0zzlQYqCxRMoTSuAn6tqZ82lKP/tMp59M5s/teWwh ejnFawu1tOudiA3sesFRCggOLYF1bZlZu8Vp6ELBdnp30G31GFNN4sVBGsq1N2h+lenS kWVg== Received: by 10.50.163.99 with SMTP id yh3mr4546910igb.53.1342428326071; Mon, 16 Jul 2012 01:45:26 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.241.2 with SMTP id lc2csp5819ibb; Mon, 16 Jul 2012 01:45:25 -0700 (PDT) Received: by 10.236.77.74 with SMTP id c50mr8627481yhe.112.1342428324711; Mon, 16 Jul 2012 01:45:24 -0700 (PDT) Received: from mail-yw0-f50.google.com (mail-yw0-f50.google.com [209.85.213.50]) by mx.google.com with ESMTPS id o41si13034989yhl.48.2012.07.16.01.45.24 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 16 Jul 2012 01:45:24 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of girish.shivananjappa@linaro.org) client-ip=209.85.213.50; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.213.50 is neither permitted nor denied by best guess record for domain of girish.shivananjappa@linaro.org) smtp.mail=girish.shivananjappa@linaro.org Received: by yhjj63 with SMTP id j63so5353973yhj.37 for ; Mon, 16 Jul 2012 01:45:24 -0700 (PDT) Received: by 10.66.89.170 with SMTP id bp10mr21277184pab.12.1342428324159; Mon, 16 Jul 2012 01:45:24 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id ka5sm11492410pbb.37.2012.07.16.01.45.15 (version=SSLv3 cipher=OTHER); Mon, 16 Jul 2012 01:45:23 -0700 (PDT) From: Girish K S To: linux-mmc@vger.kernel.org Cc: cjb@laptop.org, will.newton@imgtec.com, patches@linaro.org, linux-samsung-soc@vger.kernel.org, shashidharh@vayavyalabs.com, thomas.abraham@linaro.org, Girish K S Subject: [PATCH] mmc: dwmmc: Add quirk for broken Hardware Config Date: Mon, 16 Jul 2012 14:15:02 +0530 Message-Id: <1342428302-10707-1-git-send-email-girish.shivananjappa@linaro.org> X-Mailer: git-send-email 1.7.4.1 X-Gm-Message-State: ALoCoQnAXWSmvc96/o4M3u8bYJDqN6C5aSCNYaeMVUPjmL8gdnMR63g4bh/jE1KYgr9S4AoJVs1j In some Soc'S that integrate Designware mmc host controllers, the HCON register is broken. The hardware configuration is not updated. One specific usecase is the IDMAC. In Exysons5 SoC there exist a internal DMA, but the HCON register's DMA_INTERFACE field is not set to indicate its existance. This quirk can be used in such case to force the existance broken HCON field. Signed-off-by: Girish K S --- drivers/mmc/host/dw_mmc-pltfm.c | 5 +++++ drivers/mmc/host/dw_mmc.c | 11 ++++++++++- drivers/mmc/host/dw_mmc.h | 1 + include/linux/mmc/host.h | 1 + 4 files changed, 17 insertions(+), 1 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index 900f412..24ea485 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -35,9 +35,14 @@ static unsigned long exynos5250_dwmmc_caps[4] = { MMC_CAP_CMD23, }; +static unsigned long exynos5250_dwmmc_caps2[1] = { + MMC_CAP2_CONFIG_BROKEN, +}; + static struct dw_mci_drv_data exynos5250_drv_data = { .ctrl_type = DW_MCI_TYPE_EXYNOS5250, .caps = exynos5250_dwmmc_caps, + .caps2 = exynos5250_dwmmc_caps2, }; static const struct of_device_id dw_mci_pltfm_match[] = { diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 1a59a92..030224c 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -431,7 +431,13 @@ static int dw_mci_idmac_init(struct dw_mci *host) /* Check if Hardware Configuration Register has support for DMA */ dma_support = (mci_readl(host, HCON) >> 16) & 0x3; - if (!dma_support || dma_support > 2) { + /* + * In Some of the Soc's the HCON Register is broken. Even though the + * Soc's has a internal DMA the HCON register's DMA field doesnt + * show it. So additional quirk is added for such Soc's + */ + if ((!dma_support || dma_support > 2) && + !((u32)host->drv_data->caps2 & MMC_CAP2_CONFIG_BROKEN)) { dev_err(&host->dev, "Host Controller does not support IDMA Tx.\n"); host->dma_ops = NULL; @@ -1957,6 +1963,9 @@ static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) if (host->pdata->caps2) mmc->caps2 = host->pdata->caps2; + if (host->drv_data->caps2) + mmc->caps2 |= host->drv_data->caps2[ctrl_id]; + if (host->pdata->get_bus_wd) { if (host->pdata->get_bus_wd(slot->id) >= 4) mmc->caps |= MMC_CAP_4_BIT_DATA; diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 6c17282..8c4810a 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h @@ -203,6 +203,7 @@ extern int dw_mci_resume(struct dw_mci *host); struct dw_mci_drv_data { unsigned long ctrl_type; unsigned long *caps; + unsigned long *caps2; }; #endif /* _DW_MMC_H_ */ diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 65c64ee..ab5c7f9 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -261,6 +261,7 @@ struct mmc_host { #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ +#define MMC_CAP2_CONFIG_BROKEN (1 << 12) /* Broken Config Register */ mmc_pm_flag_t pm_caps; /* supported pm features */ unsigned int power_notify_type;