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From: Sarthak Garg <quic_sartgarg@quicinc.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
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Ulf Hansson <ulf.hansson@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
quic_cang@quicinc.com, quic_nguyenb@quicinc.com,
quic_rampraka@quicinc.com, quic_pragalla@quicinc.com,
quic_sayalil@quicinc.com, quic_nitirawa@quicinc.com,
quic_bhaskarv@quicinc.com, Sarthak Garg <quic_sartgarg@quicinc.com>
Subject: [PATCH V2 0/3] Add level shifter support for qualcomm SOC's
Date: Fri, 23 May 2025 16:27:42 +0530
Message-Id: <20250523105745.6210-1-quic_sartgarg@quicinc.com>
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| Series |
Add level shifter support for qualcomm SOC's
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expand
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Add level shifter support for qualcomm SOC's. - Changed from v1 - As suggested by Krzysztof Kozlowski redesigned logic to use compatible property for adding this level shifter support. - Addressed Adrian Hunter comments on V1 with resepect to checkpatch. - Cleared the bits first and then set bits in sdhci_msm_execute_tuning as suggested by Adrian Hunter. - Upated the if condition logic in msm_set_clock_rate_for_bus_mode as suggested by Adrian Hunter. Sarthak Garg (3): mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card mmc: sdhci-msm: Limit HS mode frequency to 37.5MHz arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken caps arch/arm64/boot/dts/qcom/sm8550.dtsi | 3 --- drivers/mmc/host/sdhci-msm.c | 34 ++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 3 deletions(-)