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[89.207.88.243]) by smtp.gmail.com with ESMTPSA id a19-20020ac25e73000000b005135bd71d6fsm286538lfr.276.2024.03.14.07.14.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Mar 2024 07:14:41 -0700 (PDT) From: Sergey Khimich To: linux-kernel@vger.kernel.org Cc: linux-mmc@vger.kernel.org, Ulf Hansson , Adrian Hunter , Shawn Lin , Jyan Chou Subject: [PATCH v6 0/2] mmc: sdhci-of-dwcmshc: Add CQE support Date: Thu, 14 Mar 2024 17:14:38 +0300 Message-Id: <20240314141440.3305802-1-serghox@gmail.com> X-Mailer: git-send-email 2.30.2 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hello! This is implementation of SDHCI CQE support for sdhci-of-dwcmshc driver. For enabling CQE support just set 'supports-cqe' in your DevTree file for appropriate mmc node. Also, while implementing CQE support for the driver, I faced with a problem which I will describe below. According to the IP block documentation CQE works only with "AMDA-2 only" mode which is activated only with v4 mode enabled. I see in dwcmshc_probe() function that v4 mode gets enabled only for 'sdhci_dwcmshc_bf3_pdata' platform data. So my question is: is it correct to enable v4 mode for all platform data if 'SDHCI_CAN_64BIT_V4' bit is set in hw? Because I`m afraid that enabling v4 mode for some platforms could break them down. On the other hand, if host controller says that it can do v4 (caps & SDHCI_CAN_64BIT_V4), lets do v4 or disable it manualy by some quirk. Anyway - RFC. v2: - Added dwcmshc specific cqe_disable hook to prevent losing in-flight cmd when an ioctl is issued and cqe_disable is called; - Added processing 128Mb boundary for the host memory data buffer size and the data buffer. For implementing this processing an extra callback is added to the struct 'sdhci_ops'. - Fixed typo. v3: - Fix warning reported by kernel test robot: | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202309270807.VoVn81m6-lkp@intel.com/ | Closes: https://lore.kernel.org/oe-kbuild-all/202309300806.dcR19kcE-lkp@intel.com/ v4: - Data reset moved to custom driver tuning hook. - Removed unnecessary dwcmshc_sdhci_cqe_disable() func - Removed unnecessary dwcmshc_cqhci_set_tran_desc. Export and use cqhci_set_tran_desc() instead. - Provide a hook for cqhci_set_tran_desc() instead of cqhci_prep_tran_desc(). - Fix typo: int_clok_disable --> int_clock_disable v5: - Fix warning reported by kernel test robot: | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202312301130.itEZhhI5-lkp@intel.com/ v6: - Rebase to master branch - Fix typo; - Fix double blank line; - Add cqhci_suspend() and cqhci_resume() functions to support mmc suspend-to-ram (s2r); - Move reading DWCMSHC_P_VENDOR_AREA2 register under "supports-cqe" condition as not all IPs have that register; - Remove sdhci V4 mode from the list of prerequisites to init cqhci. Sergey Khimich (2): mmc: cqhci: Add cqhci set_tran_desc() callback mmc: sdhci-of-dwcmshc: Implement SDHCI CQE support drivers/mmc/host/Kconfig | 1 + drivers/mmc/host/cqhci-core.c | 11 +- drivers/mmc/host/cqhci.h | 4 + drivers/mmc/host/sdhci-of-dwcmshc.c | 188 +++++++++++++++++++++++++++- 4 files changed, 199 insertions(+), 5 deletions(-)