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[46.135.45.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422871ec9e6sm28201695e9.38.2024.06.12.06.53.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Jun 2024 06:53:06 -0700 (PDT) From: Tomeu Vizoso Date: Wed, 12 Jun 2024 15:52:55 +0200 Subject: [PATCH 2/9] iommu/rockchip: Attach multiple power domains Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240612-6-10-rocket-v1-2-060e48eea250@tomeuvizoso.net> References: <20240612-6-10-rocket-v1-0-060e48eea250@tomeuvizoso.net> In-Reply-To: <20240612-6-10-rocket-v1-0-060e48eea250@tomeuvizoso.net> To: Joerg Roedel , Will Deacon , Robin Murphy , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Oded Gabbay , Tomeu Vizoso , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Philipp Zabel , Sumit Semwal , =?utf-8?q?Christian_K=C3=B6nig?= Cc: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-media@vger.kernel.org, linaro-mm-sig@lists.linaro.org, Tomeu Vizoso X-Mailer: b4 0.13.0 IOMMUs with multiple base addresses can also have multiple power domains. The base framework only takes care of a single power domain, as some devices will need for these power domains to be powered on in a specific order. Use a helper function to stablish links in the order in which they are in the DT. This is needed by the IOMMU used by the NPU in the RK3588. Signed-off-by: Tomeu Vizoso --- drivers/iommu/rockchip-iommu.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index f5629515bd78..673b0ebb6262 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -6,6 +6,8 @@ * Daniel Kurtz */ +#include "linux/err.h" +#include "linux/pm_domain.h" #include #include #include @@ -115,6 +117,7 @@ struct rk_iommu { struct iommu_device iommu; struct list_head node; /* entry in rk_iommu_domain.iommus */ struct iommu_domain *domain; /* domain to which iommu is attached */ + struct dev_pm_domain_list *pmdomains; }; struct rk_iommudata { @@ -1186,6 +1189,7 @@ static int rk_iommu_probe(struct platform_device *pdev) struct resource *res; const struct rk_iommu_ops *ops; int num_res = pdev->num_resources; + int pm_domain_count; int err, i; iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); @@ -1271,6 +1275,35 @@ static int rk_iommu_probe(struct platform_device *pdev) if (!dma_dev) dma_dev = &pdev->dev; + pm_domain_count = of_property_count_strings(iommu->dev->of_node, "power-domain-names"); + if (pm_domain_count > 0) { + const char **pm_domains = kvmalloc_array(pm_domain_count, sizeof(*pm_domains), GFP_KERNEL); + struct dev_pm_domain_attach_data pm_domain_data = { + .pd_names = pm_domains, + .num_pd_names = pm_domain_count, + .pd_flags = PD_FLAG_DEV_LINK_ON, + }; + int i; + + if (!pm_domain_data.pd_names) { + err = -ENOMEM; + goto err_remove_sysfs; + } + + for (i = 0; i < pm_domain_count; i++) { + err = of_property_read_string_index(iommu->dev->of_node, "power-domain-names", i, &pm_domains[i]); + if (err) { + kfree(pm_domains); + goto err_remove_sysfs; + } + } + + err = dev_pm_domain_attach_list(iommu->dev, &pm_domain_data, &iommu->pmdomains); + kfree(pm_domains); + if (err < 0) + goto err_remove_sysfs; + } + pm_runtime_enable(dev); for (i = 0; i < iommu->num_irq; i++) { @@ -1292,6 +1325,7 @@ static int rk_iommu_probe(struct platform_device *pdev) return 0; err_pm_disable: pm_runtime_disable(dev); + dev_pm_domain_detach_list(iommu->pmdomains); err_remove_sysfs: iommu_device_sysfs_remove(&iommu->iommu); err_unprepare_clocks: @@ -1310,6 +1344,8 @@ static void rk_iommu_shutdown(struct platform_device *pdev) devm_free_irq(iommu->dev, irq, iommu); } + dev_pm_domain_detach_list(iommu->pmdomains); + pm_runtime_force_suspend(&pdev->dev); }