From patchwork Wed May 14 15:41:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch via B4 Relay X-Patchwork-Id: 890455 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B40327C173; Wed, 14 May 2025 15:53:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237984; cv=none; b=oFpBNrTyY60JlpBNMA/5JoBT6sxMEUpraMD7Xm8EyOQQzWW0eesb8CO/zXy8zY3/0st6RniKFG5ECTf28uOhktKDhs09MAjV6tBeKfm9/IVrmLy7W0v3hv0fYisOxCG3UCuuSjgFsNVvn7WTBYbbRdKM3CMkCZ7NVJyTvLrkPtM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237984; c=relaxed/simple; bh=TEIqlq+5yKSwxXx0Y5lvisO4BGJKPTyLy5IgFKq8sDY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=T+DMpQowQh+5QPeaCyVCuIjCL9TWtX2QU1lN3CHl0W4zKkCnjaAOcPq7wyfwlDGRm1eKz9KHy4DtIrTC5WqJiFlOKJwPb8ky9T1Ai7EdzvV7h2BrjWk5iOabEnNG/1KIphL6GcqaCWK8nXqLwfTsWJo0cD/z+AjSA5vzuPo7394= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=IDDUi9Vs; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="IDDUi9Vs" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7FE2CC4AF48; Wed, 14 May 2025 15:53:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747237983; bh=TEIqlq+5yKSwxXx0Y5lvisO4BGJKPTyLy5IgFKq8sDY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=IDDUi9VswkU8uIXnR40Gz6g2UAK/pHKcRPiO86np+o0741kM4lkoBY36vgI2MFFKZ 0Jy572nqa0gCwfaGr0m/kLrf/1Nl46jIRwk5q/3Vs0sQt4A3vw+OPX4DPbeglV/k8s E9eTYNGx3vubXaUmufdCmVJc+zACQ5ZUJtQ3coh/9DpclzYMEDmNwbSYJhH8OHylot blnEg90IGXYobxsvnDCnmMeFAsvpXPQj98k6bhOwKCRaqIhDOd98jb2fpEOBFoDbRq ADlcPYlA8ZHAUpRyLo4AuAApL/8BVabYm6YNcI21gV9FJM8xz6EljaG4AOlpcqeP+p AUsatUdBpdCDg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 705EEC3ABD8; Wed, 14 May 2025 15:53:03 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 14 May 2025 17:41:13 +0200 Subject: [PATCH v7 12/14] arm64: dts: rockchip: add vicap node to rk356x Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-rk3568-vicap-v7-12-7581fd96a33a@collabora.com> References: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Leb?= =?utf-8?q?run?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747237265; l=2050; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=lEu6UcdwUJ585mOVJj4+wXFbf1qt1nIxcP9Qq7FSezA=; b=CK4N7yQQIKBnhubFHf4MQX+8tqsMNJkCjWC+sz2dtrirpTRTJjj0Qjj/JDEf1aps7ARIjS50h SoKOEfx7hPDBsBkdVyCeZBcVjt73dfccKq3u0T154PYQbmhUtHbMDwF X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK356x Video Capture (VICAP) unit. Signed-off-by: Michael Riesch Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 44 +++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi index fd2214b6fad4..e0e4dc85a3a9 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi @@ -564,6 +564,50 @@ gpu: gpu@fde60000 { status = "disabled"; }; + vicap: video-capture@fdfe0000 { + compatible = "rockchip,rk3568-vicap"; + reg = <0x0 0xfdfe0000 0x0 0x200>; + interrupts = ; + assigned-clocks = <&cru DCLK_VICAP>; + assigned-clock-rates = <300000000>; + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>; + clock-names = "aclk", "hclk", "dclk", "iclk"; + iommus = <&vicap_mmu>; + power-domains = <&power RK3568_PD_VI>; + resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>, + <&cru SRST_I_VICAP>; + reset-names = "arst", "hrst", "drst", "prst", "irst"; + rockchip,grf = <&grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + vicap_dvp: port@0 { + reg = <0>; + }; + + vicap_mipi: port@1 { + reg = <1>; + }; + }; + }; + + vicap_mmu: iommu@fdfe0800 { + compatible = "rockchip,rk3568-iommu"; + reg = <0x0 0xfdfe0800 0x0 0x100>; + interrupts = ; + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; + power-domains = <&power RK3568_PD_VI>; + rockchip,disable-mmu-reset; + status = "disabled"; + }; + vpu: video-codec@fdea0400 { compatible = "rockchip,rk3568-vpu"; reg = <0x0 0xfdea0000 0x0 0x800>;