From patchwork Wed May 14 15:41:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Riesch via B4 Relay X-Patchwork-Id: 890456 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DDAD827B4EB; Wed, 14 May 2025 15:53:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237984; cv=none; b=tn/mMkou/UYxBlPvrpr2X0zLDY2jDMpWuza/6StV5C/ke7RvcweRutWd7Y0J7BE5L3W7CX2qdiDv/GDZVY3aWfACNiaTq9X/iHZH4gFqsZBeay+ggRgJi3sopuVdi5IVFKCHNGr1kefosKYCkEhkeucJJ47fm8txt8ApfdDftss= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747237984; c=relaxed/simple; bh=hvc8YjD+3Czi8oyUKN3U+pIlgdxqaGnu32O+P0Ce/cI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oGadVFsobLsdpLDGImvwtjUEyDtzf9z2/LEbVQcdJH/l6Yn5HpdyVgS9avTuqPdrSIEyicEvkRTmaai3L4U84Wq9ahn3R/1VRyVuooW6M5AWBloBLZ37Z5K7zQsifV2L9kLt6wCQObfdqPUOm+RN89+v883IONoLi37+MNOZnHI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=gIDGCzVy; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="gIDGCzVy" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5DAA5C19425; Wed, 14 May 2025 15:53:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747237983; bh=hvc8YjD+3Czi8oyUKN3U+pIlgdxqaGnu32O+P0Ce/cI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=gIDGCzVylzShc2o/8DPM3YUvCyn3HgHya42+/QGISK6OarnIuIUvOhZkwuJxYymmi RJV5tj9V7NgoTGwi6aMizTb7mR3fZ+JhjCP9lEbrLTmhVXNUbqCcr3MCckg+LO93Mx cQuo2pHjgo+rozsL5xEJziLObpws4QJtCiQN+EBrIZ/U252e5IZlL98w3zHFZL1crn seJnoRU0dsFVWtL2yzye0V/fWWzyI2igHrBJxsFVo1zohd3+Tavv5snEPN6in438G8 CHkHZfYXZPwdBmFweVw5OJmcEU939nHmhrFbTgJSFHA5yzjk/uNSaz4TH1kLPmtQkI YBAQUIdyBjacQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52EE0C54756; Wed, 14 May 2025 15:53:03 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 14 May 2025 17:41:11 +0200 Subject: [PATCH v7 10/14] arm64: defconfig: enable rockchip mipi csi-2 receiver Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240220-rk3568-vicap-v7-10-7581fd96a33a@collabora.com> References: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> In-Reply-To: <20240220-rk3568-vicap-v7-0-7581fd96a33a@collabora.com> To: Mehdi Djait , Maxime Chevallier , =?utf-8?q?Th=C3=A9o_Leb?= =?utf-8?q?run?= , Thomas Petazzoni , Gerald Loacker , Bryan O'Donoghue , Markus Elfring , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Nicolas Dufresne , Sebastian Reichel , Collabora Kernel Team , Paul Kocialkowski , Alexander Shiyan , Val Packett , Rob Herring , Philipp Zabel , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, Michael Riesch , Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747237265; l=782; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=L/KlLC17WtwsxJrk0tU9EzILCecoj5a5gEXcaOiLEks=; b=2jMCAGG/ajS58qyDx/LvTprPIbWWJsUpKmqgF8kQAv3bXqgShW4ygUwoZ76GWphXaAI1ECUed rD0DkZUYvz6CvMArfhsj1HZeTHkz+RftPRZYrvbMi7W7nHGp3/J4/iK X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Rockchip MIPI CSI-2 Receiver is featured in several recent Rockchip SoCs, such as the RK3568 or the RK3588. Enable the driver for it in the default configuration. Signed-off-by: Michael Riesch --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 110ff52195a6..ffef4cd024a1 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -859,6 +859,7 @@ CONFIG_VIDEO_RENESAS_FDP1=m CONFIG_VIDEO_RENESAS_VSP1=m CONFIG_VIDEO_RCAR_DRIF=m CONFIG_VIDEO_ROCKCHIP_CIF=m +CONFIG_VIDEO_ROCKCHIP_CSI=m CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC=m CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m CONFIG_VIDEO_SAMSUNG_S5P_MFC=m