From patchwork Sat Dec 23 18:29:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 757982 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AF814208B9; Sat, 23 Dec 2023 18:29:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="o7i19TwW" X-UUID: 39146dbaa1c111eea5db2bebc7c28f94-20231224 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=FohLHuwR5pWdFIMjeWFuNauxCDTVDMuBv6CLayuSkdU=; b=o7i19TwWSPnGXLZjtjM5TVSuA1gtR4UHekbuW2p5ESKZTDO/epopG1ToQkd6EbvRmYG+WeV8A/QLvdxymumwOjLP//o54UECOojC68hadD83mHDzVVsssBoDBat31HUblmTrL+tsSsJSPYNLXr0OQvy1j+O50sPnG7Up+6HEZoI=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.35, REQID:7846d6e5-0e7f-48e5-a98a-17249b80b703, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:5d391d7, CLOUDID:74c0692e-1ab8-4133-9780-81938111c800, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR: NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 39146dbaa1c111eea5db2bebc7c28f94-20231224 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1647488399; Sun, 24 Dec 2023 02:29:35 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n1.mediatek.inc (172.21.101.193) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sun, 24 Dec 2023 02:29:34 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sun, 24 Dec 2023 02:29:33 +0800 From: Jason-JH.Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Kuang Hu CC: , , , , , , , Jason-ch Chen , Johnson Wang , "Jason-JH . Lin" , Singo Chang , Nancy Lin , Shawn Sung , , Jeffrey Kardatzke , CK Hu , Nicolas Boichat , Philipp Zabel Subject: [PATCH v3 01/11] drm/mediatek: Add interface to allocate MediaTek GEM buffer. Date: Sun, 24 Dec 2023 02:29:22 +0800 Message-ID: <20231223182932.27683-2-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20231223182932.27683-1-jason-jh.lin@mediatek.com> References: <20231223182932.27683-1-jason-jh.lin@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N From: CK Hu Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs to be used by render nodes. This patch also sets the RENDER driver feature. Signed-off-by: CK Hu Signed-off-by: Nicolas Boichat Signed-off-by: Philipp Zabel Signed-off-by: Jason-JH.Lin Reviewed-by: Daniel Kurtz Reviewed-by: Nicolas Boichat Tested-by: Daniel Kurtz Tested-by: Pi-Hsun Shih --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 13 ++++++ drivers/gpu/drm/mediatek/mtk_drm_gem.c | 39 +++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_gem.h | 12 ++++++ include/uapi/drm/mediatek_drm.h | 58 ++++++++++++++++++++++++++ 4 files changed, 122 insertions(+) create mode 100644 include/uapi/drm/mediatek_drm.h diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 2b0c35cacbc6..5d2a39e491aa 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "mtk_drm_crtc.h" #include "mtk_drm_ddp_comp.h" @@ -569,6 +570,14 @@ static void mtk_drm_kms_deinit(struct drm_device *drm) component_unbind_all(drm->dev, drm); } +static const struct drm_ioctl_desc mtk_ioctls[] = { + DRM_IOCTL_DEF_DRV(MTK_GEM_CREATE, mtk_gem_create_ioctl, + DRM_UNLOCKED | DRM_AUTH | DRM_RENDER_ALLOW), + DRM_IOCTL_DEF_DRV(MTK_GEM_MAP_OFFSET, + mtk_gem_map_offset_ioctl, + DRM_UNLOCKED | DRM_AUTH | DRM_RENDER_ALLOW), +}; + DEFINE_DRM_GEM_FOPS(mtk_drm_fops); /* @@ -590,6 +599,10 @@ static const struct drm_driver mtk_drm_driver = { .gem_prime_import = mtk_drm_gem_prime_import, .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table, + + .ioctls = mtk_ioctls, + .num_ioctls = ARRAY_SIZE(mtk_ioctls), + .fops = &mtk_drm_fops, .name = DRIVER_NAME, diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.c b/drivers/gpu/drm/mediatek/mtk_drm_gem.c index 4f2e3feabc0f..30e347adcbe9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_gem.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.c @@ -4,6 +4,7 @@ */ #include +#include #include #include @@ -283,3 +284,41 @@ void mtk_drm_gem_prime_vunmap(struct drm_gem_object *obj, mtk_gem->kvaddr = NULL; kfree(mtk_gem->pages); } + +int mtk_gem_map_offset_ioctl(struct drm_device *drm, void *data, + struct drm_file *file_priv) +{ + struct drm_mtk_gem_map_off *args = data; + + return drm_gem_dumb_map_offset(file_priv, drm, args->handle, + &args->offset); +} + +int mtk_gem_create_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv) +{ + struct mtk_drm_gem_obj *mtk_gem; + struct drm_mtk_gem_create *args = data; + int ret; + + mtk_gem = mtk_drm_gem_create(dev, args->size, false); + if (IS_ERR(mtk_gem)) + return PTR_ERR(mtk_gem); + + /* + * allocate a id of idr table where the obj is registered + * and handle has the id what user can see. + */ + ret = drm_gem_handle_create(file_priv, &mtk_gem->base, &args->handle); + if (ret) + goto err_handle_create; + + /* drop reference from allocate - handle holds it now. */ + drm_gem_object_put(&mtk_gem->base); + + return 0; + +err_handle_create: + mtk_drm_gem_free_object(&mtk_gem->base); + return ret; +} diff --git a/drivers/gpu/drm/mediatek/mtk_drm_gem.h b/drivers/gpu/drm/mediatek/mtk_drm_gem.h index 78f23b07a02e..90f3d2916ec5 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_gem.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_gem.h @@ -46,4 +46,16 @@ int mtk_drm_gem_prime_vmap(struct drm_gem_object *obj, struct iosys_map *map); void mtk_drm_gem_prime_vunmap(struct drm_gem_object *obj, struct iosys_map *map); +/* + * request gem object creation and buffer allocation as the size + * that it is calculated with framebuffer information such as width, + * height and bpp. + */ +int mtk_gem_create_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + +/* get buffer offset to map to user space. */ +int mtk_gem_map_offset_ioctl(struct drm_device *dev, void *data, + struct drm_file *file_priv); + #endif diff --git a/include/uapi/drm/mediatek_drm.h b/include/uapi/drm/mediatek_drm.h new file mode 100644 index 000000000000..f4d47577c94e --- /dev/null +++ b/include/uapi/drm/mediatek_drm.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ +/* + * Copyright (c) 2015 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _UAPI_MEDIATEK_DRM_H +#define _UAPI_MEDIATEK_DRM_H + +#include + +/** + * struct drm_mtk_gem_create - User-desired buffer creation information structure. + * + * @size: user-desired memory allocation size. + * - this size value would be page-aligned internally. + * @flags: user request for setting memory type or cache attributes. + * @handle: returned a handle to created gem object. + * - this handle will be set by gem module of kernel side. + */ +struct drm_mtk_gem_create { + uint64_t size; + uint32_t flags; + uint32_t handle; +}; + +/** + * struct drm_mtk_gem_map_off - A structure for getting buffer offset. + * + * @handle: a pointer to gem object created. + * @pad: just padding to be 64-bit aligned. + * @offset: relatived offset value of the memory region allocated. + * - this value should be set by user. + */ +struct drm_mtk_gem_map_off { + uint32_t handle; + uint32_t pad; + uint64_t offset; +}; + +#define DRM_MTK_GEM_CREATE 0x00 +#define DRM_MTK_GEM_MAP_OFFSET 0x01 + +#define DRM_IOCTL_MTK_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ + DRM_MTK_GEM_CREATE, struct drm_mtk_gem_create) + +#define DRM_IOCTL_MTK_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \ + DRM_MTK_GEM_MAP_OFFSET, struct drm_mtk_gem_map_off) + +#endif /* _UAPI_MEDIATEK_DRM_H */