| Message ID | 20231012084037.19376-11-moudy.ho@mediatek.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | introduce more MDP3 components in MT8195 | expand |
Il 12/10/23 10:40, Moudy Ho ha scritto: > Add the fundamental hardware configuration of component TDSHP, > which is controlled by MDP3 on MT8195. > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > --- > .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++ > 1 file changed, 61 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml > new file mode 100644 > index 000000000000..92e1547e7c7f > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml > @@ -0,0 +1,61 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek Media Data Path 3 TDSHP Please unroll it.... MediaTek Media Data Path 3 Two-Dimensional Sharpness > + > +maintainers: > + - Matthias Brugger <matthias.bgg@gmail.com> > + - Moudy Ho <moudy.ho@mediatek.com> > + > +description: > + One of Media Data Path 3 (MDP3) components used to improve image > + sharpness and contrast. Two-Dimensional Sharpness (TDSHP) is a MDP3 component used to perform image edge sharpening and enhance vividness and contrast. > + > +properties: > + compatible: > + enum: > + - mediatek,mt8195-mdp3-tdshp > + > + reg: > + maxItems: 1 > + > + mediatek,gce-client-reg: > + description: > + The register of display function block to be set by gce. There are 4 arguments, > + such as gce node, subsys id, offset and register size. The subsys id that is > + mapping to the register of display function blocks is defined in the gce header > + include/dt-bindings/gce/<chip>-gce.h of each chips. > + $ref: /schemas/types.yaml#/definitions/phandle-array > + items: > + items: > + - description: phandle of GCE > + - description: GCE subsys id > + - description: register offset > + - description: register size > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - mediatek,gce-client-reg > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8195-clk.h> > + #include <dt-bindings/gce/mt8195-gce.h> > + > + display@14007000 { > + compatible = "mediatek,mt8195-mdp3-tdshp"; > + reg = <0x14007000 0x1000>; > + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>; > + clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>; > + };
On 12/10/2023 10:40, Moudy Ho wrote: > Add the fundamental hardware configuration of component TDSHP, > which is controlled by MDP3 on MT8195. > > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml new file mode 100644 index 000000000000..92e1547e7c7f --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/mediatek,mdp3-tdshp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek Media Data Path 3 TDSHP + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + - Moudy Ho <moudy.ho@mediatek.com> + +description: + One of Media Data Path 3 (MDP3) components used to improve image + sharpness and contrast. + +properties: + compatible: + enum: + - mediatek,mt8195-mdp3-tdshp + + reg: + maxItems: 1 + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/dt-bindings/gce/<chip>-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: phandle of GCE + - description: GCE subsys id + - description: register offset + - description: register size + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - mediatek,gce-client-reg + - clocks + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8195-clk.h> + #include <dt-bindings/gce/mt8195-gce.h> + + display@14007000 { + compatible = "mediatek,mt8195-mdp3-tdshp"; + reg = <0x14007000 0x1000>; + mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x7000 0x1000>; + clocks = <&vppsys0 CLK_VPP0_MDP_TDSHP>; + };
Add the fundamental hardware configuration of component TDSHP, which is controlled by MDP3 on MT8195. Signed-off-by: Moudy Ho <moudy.ho@mediatek.com> --- .../bindings/media/mediatek,mdp3-tdshp.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml