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[83.9.32.15]) by smtp.gmail.com with ESMTPSA id m8-20020a2e97c8000000b002b6fed37b18sm580048ljj.101.2023.08.04.13.09.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Aug 2023 13:09:14 -0700 (PDT) From: Konrad Dybcio Date: Fri, 04 Aug 2023 22:09:08 +0200 Subject: [PATCH 1/6] media: dt-bindings: Document SC8280XP/SM8350 Venus MIME-Version: 1.0 Message-Id: <20230731-topic-8280_venus-v1-1-8c8bbe1983a5@linaro.org> References: <20230731-topic-8280_venus-v1-0-8c8bbe1983a5@linaro.org> In-Reply-To: <20230731-topic-8280_venus-v1-0-8c8bbe1983a5@linaro.org> To: Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Marijn Suijten , Konrad Dybcio , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1691179750; l=4196; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=qPZ+tkyKC+Whn4SENKO8Du3EyX1XBNWI1sx5+8QX9+M=; b=XrOc4Lb7+7O/RxyzONJjYO8r9ksbbpY08duzDjb89Qfu5iuQUFWH4iDxA3kgtp5gODXME0wjd V2An/YoZJrEC/bxGjyWXa6UjA6yY2AgD/tHWXB1LrczKbQcHyJ1Cjyu X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Both of these SoCs implement an IRIS2 block, with SC8280XP being able to clock it a bit higher. Document it. Signed-off-by: Konrad Dybcio --- .../bindings/media/qcom,sm8350-venus.yaml | 149 +++++++++++++++++++++ 1 file changed, 149 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,sm8350-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sm8350-venus.yaml new file mode 100644 index 000000000000..8a31bce27c18 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sm8350-venus.yaml @@ -0,0 +1,149 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sm8350-venus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8350 Venus video encode and decode accelerators + +maintainers: + - Konrad Dybcio + +description: | + The Venus Iris2 IP is a video encode and decode accelerator present + on Qualcomm platforms + +allOf: + - $ref: qcom,venus-common.yaml# + +properties: + compatible: + enum: + - qcom,sc8280xp-venus + - qcom,sm8350-venus + + clocks: + maxItems: 3 + + clock-names: + items: + - const: iface + - const: core + - const: vcodec0_core + + resets: + maxItems: 1 + + reset-names: + items: + - const: core + + power-domains: + maxItems: 3 + + power-domain-names: + items: + - const: venus + - const: vcodec0 + - const: mx + + interconnects: + maxItems: 3 + + interconnect-names: + items: + - const: cpu-cfg + - const: video-mem + - const: video-llcc + + operating-points-v2: true + opp-table: + type: object + + iommus: + maxItems: 1 + + video-decoder: + type: object + + properties: + compatible: + const: venus-decoder + + required: + - compatible + + additionalProperties: false + + video-encoder: + type: object + + properties: + compatible: + const: venus-encoder + + required: + - compatible + + additionalProperties: false + +required: + - compatible + - power-domain-names + - iommus + - video-decoder + - video-encoder + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + venus: video-codec@aa00000 { + compatible = "qcom,sm8350-venus"; + reg = <0x0aa00000 0x100000>; + interrupts = ; + + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>; + clock-names = "iface", + "core", + "vcodec0_core"; + + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "core"; + + power-domains = <&videocc MVS0C_GDSC>, + <&videocc MVS0_GDSC>, + <&rpmhpd SM8350_MX>; + power-domain-names = "venus", + "vcodec0", + "mx"; + + interconnects = <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_VENUS_CFG 0>, + <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>, + <&mmss_noc MASTER_VIDEO_P0 0 &gem_noc SLAVE_LLCC 0>; + interconnect-names = "cpu-cfg", + "video-mem", + "video-llcc"; + + operating-points-v2 = <&venus_opp_table>; + iommus = <&apps_smmu 0x2100 0x400>; + memory-region = <&pil_video_mem>; + + status = "disabled"; + + video-decoder { + compatible = "venus-decoder"; + }; + + video-encoder { + compatible = "venus-encoder"; + }; + };