From patchwork Mon Apr 3 09:13:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 669960 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E636C77B60 for ; Mon, 3 Apr 2023 09:17:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231985AbjDCJRb (ORCPT ); Mon, 3 Apr 2023 05:17:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231991AbjDCJRN (ORCPT ); Mon, 3 Apr 2023 05:17:13 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E98FC10AAC; Mon, 3 Apr 2023 02:16:45 -0700 (PDT) X-UUID: 3369678ad20011eda9a90f0bb45854f4-20230403 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=w7h1+V4mSmpmxgEEvepRAQu3Berq17NW7THqwLhQ31g=; b=WKW4kZA3qbAAhy4ThYZQaoYuK/eewhpwo9I8sW24q2C4UA2oBQJQ381JUP6CwYa46cYidc7WjV0B6bqKPxvdSFUy8EtBxfXLQrBOhNohjdUTU2wAneurwlHLYzJO86pP5b2XCVgLDttznC6RGmhekb2YQWalpi1JH6ZoKeV26nE=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.22, REQID:1625cc5b-48fd-4eba-af25-ee97c27846bf, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:120426c, CLOUDID:fdde23b5-beed-4dfc-bd9c-e1b22fa6ccc4, B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-UUID: 3369678ad20011eda9a90f0bb45854f4-20230403 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1597141475; Mon, 03 Apr 2023 17:16:22 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Mon, 3 Apr 2023 17:16:21 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Mon, 3 Apr 2023 17:16:20 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Mauro Carvalho Chehab , Rob Herring CC: Will Deacon , Robin Murphy , Krzysztof Kozlowski , Hans Verkuil , , , , , , , , AngeloGioacchino Del Regno , , , , Yunfei Dong , kyrie wu , , , , Yong Wu Subject: [PATCH v6 13/14] arm64: dts: mt8195: Add dma-ranges for the parent "soc" node Date: Mon, 3 Apr 2023 17:13:36 +0800 Message-ID: <20230403091337.26745-14-yong.wu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230403091337.26745-1-yong.wu@mediatek.com> References: <20230403091337.26745-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org After commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for bus controllers"), the dma-ranges property is not allowed for the leaf node. But our iommu/dma-ranges is 16GB, we still expect separate the 16GB dma-range like: a) display is in 0 - 4GB; b) vcodec is in 4GB - 8GB; c) camera is in 8GB - 12GB. We can not expect all the masters add a parent node for them, especial for the existed drivers/nodes. Thus, we add whole the 16GB dma-ranges in the parent "soc" node. Signed-off-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 89f469ba9f6c..7d87cbabc9f1 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -364,6 +364,7 @@ soc { #size-cells = <2>; compatible = "simple-bus"; ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>; gic: interrupt-controller@c000000 { compatible = "arm,gic-v3";