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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id h17-20020ac250d1000000b004db3aa3c542sm1363688lfm.47.2023.02.28.07.24.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 07:24:43 -0800 (PST) From: Konrad Dybcio Date: Tue, 28 Feb 2023 16:24:31 +0100 Subject: [PATCH 07/18] media: venus: core: Assign registers based on VPU version MIME-Version: 1.0 Message-Id: <20230228-topic-venus-v1-7-58c2c88384e9@linaro.org> References: <20230228-topic-venus-v1-0-58c2c88384e9@linaro.org> In-Reply-To: <20230228-topic-venus-v1-0-58c2c88384e9@linaro.org> To: Stanimir Varbanov , Vikash Garodia , Andy Gross , Bjorn Andersson , Mauro Carvalho Chehab , Dikshita Agarwal , Bryan O'Donoghue , Dikshita Agarwal , Mansur Alisha Shaik , Jonathan Marek Cc: Mauro Carvalho Chehab , Stanimir Varbanov , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Vikash Garodia , Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677597872; l=889; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=sx/AsEeutDVEzb05mFqQidBHgnDp5m3CRWWH6EqqBeA=; b=m4cuQUCpvYiAZQbjgycB0N68xXrrz6IIK6w4NiPk96vWScEx1BdCbbgSAriCj8PHJlR7g3nxtMqb //Wbg3VED9QLsRST2RgL4dngMe81BMwYI8DxA/obxxyOj59mrOtw X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org IRIS2(_1) has a different register map compared to other HFI6XX- using VPUs. Take care of it. Signed-off-by: Konrad Dybcio --- drivers/media/platform/qcom/venus/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index c13436d58ed3..bdc14acc8399 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -246,7 +246,7 @@ static int venus_enumerate_codecs(struct venus_core *core, u32 type) static void venus_assign_register_offsets(struct venus_core *core) { - if (IS_V6(core)) { + if (IS_IRIS2(core) || IS_IRIS2_1(core)) { core->vbif_base = core->base + VBIF_BASE; core->cpu_base = core->base + CPU_BASE_V6; core->cpu_cs_base = core->base + CPU_CS_BASE_V6;