diff mbox series

[03/12] dt-bindings: nvmem: convert amlogic-meson-mx-efuse.txt to dt-schema

Message ID 20221117-b4-amlogic-bindings-convert-v1-3-3f025599b968@linaro.org
State Superseded
Headers show
Series dt-bindings: first batch of dt-schema conversions for Amlogic Meson bindings | expand

Commit Message

Neil Armstrong Nov. 18, 2022, 2:33 p.m. UTC
Convert the Amlogic Meson6 eFuse bindings to dt-schema.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 .../bindings/nvmem/amlogic,meson6-efuse.yaml       | 64 ++++++++++++++++++++++
 .../bindings/nvmem/amlogic-meson-mx-efuse.txt      | 22 --------
 2 files changed, 64 insertions(+), 22 deletions(-)

Comments

Martin Blumenstingl Nov. 25, 2022, 11:04 p.m. UTC | #1
Hi Neil,

thanks for your work on this!

On Fri, Nov 18, 2022 at 3:33 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> +        #address-cells = <1>;
> +        #size-cells = <1>;
> +
> +        sn: sn@14 {
> +            reg = <0x14 0x10>;
> +        };
> +
> +        eth_mac: mac@34 {
> +            reg = <0x34 0x10>;
> +        };
> +
> +        bid: bid@46 {
> +            reg = <0x46 0x30>;
> +        };
I assume you took these examples from the newer, GX eFuse?
Unfortunately on boards with these older SoCs the serial number and
MAC address are often not stored in the eFuse.
This is just an example, so I won't be sad if we keep them. To avoid
confusion I suggest switching to different examples:
  ethernet_mac_address: mac@1b4 {
    reg = <0x1b4 0x6>;
  };
  temperature_calib: calib@1f4 {
     reg = <0x1f4 0x4>;
  };

What do you think?


Best regards,
Martin
Neil Armstrong Jan. 9, 2023, 11:38 a.m. UTC | #2
On 26/11/2022 00:04, Martin Blumenstingl wrote:
> Hi Neil,
> 
> thanks for your work on this!
> 
> On Fri, Nov 18, 2022 at 3:33 PM Neil Armstrong
> <neil.armstrong@linaro.org> wrote:
> [...]
>> +        #address-cells = <1>;
>> +        #size-cells = <1>;
>> +
>> +        sn: sn@14 {
>> +            reg = <0x14 0x10>;
>> +        };
>> +
>> +        eth_mac: mac@34 {
>> +            reg = <0x34 0x10>;
>> +        };
>> +
>> +        bid: bid@46 {
>> +            reg = <0x46 0x30>;
>> +        };
> I assume you took these examples from the newer, GX eFuse?
> Unfortunately on boards with these older SoCs the serial number and
> MAC address are often not stored in the eFuse.
> This is just an example, so I won't be sad if we keep them. To avoid
> confusion I suggest switching to different examples:
>    ethernet_mac_address: mac@1b4 {
>      reg = <0x1b4 0x6>;
>    };
>    temperature_calib: calib@1f4 {
>       reg = <0x1f4 0x4>;
>    };
> 
> What do you think?


Sure switched to it !

Neil
> 
> 
> Best regards,
> Martin
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml b/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml
new file mode 100644
index 000000000000..232d68d7fbcb
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml
@@ -0,0 +1,64 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Meson6 eFuse
+
+maintainers:
+  - Neil Armstrong <neil.armstrong@linaro.org>
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+allOf:
+  - $ref: nvmem.yaml#
+
+properties:
+  compatible:
+    enum:
+      - amlogic,meson6-efuse
+      - amlogic,meson8-efuse
+      - amlogic,meson8b-efuse
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: core
+
+  secure-monitor:
+    description: phandle to the secure-monitor node
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    efuse: efuse@0 {
+        compatible = "amlogic,meson6-efuse";
+        reg = <0x0 0x2000>;
+        clocks = <&clk_efuse>;
+        clock-names = "core";
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        sn: sn@14 {
+            reg = <0x14 0x10>;
+        };
+
+        eth_mac: mac@34 {
+            reg = <0x34 0x10>;
+        };
+
+        bid: bid@46 {
+            reg = <0x46 0x30>;
+        };
+    };
diff --git a/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt b/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt
deleted file mode 100644
index a3c63954a1a4..000000000000
--- a/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt
+++ /dev/null
@@ -1,22 +0,0 @@ 
-Amlogic Meson6/Meson8/Meson8b efuse
-
-Required Properties:
-- compatible: depending on the SoC this should be one of:
-	- "amlogic,meson6-efuse"
-	- "amlogic,meson8-efuse"
-	- "amlogic,meson8b-efuse"
-- reg: base address and size of the efuse registers
-- clocks: a reference to the efuse core gate clock
-- clock-names: must be "core"
-
-All properties and sub-nodes as well as the consumer bindings
-defined in nvmem.txt in this directory are also supported.
-
-
-Example:
-	efuse: nvmem@0 {
-		compatible = "amlogic,meson8-efuse";
-		reg = <0x0 0x2000>;
-		clocks = <&clkc CLKID_EFUSE>;
-		clock-names = "core";
-	};