From patchwork Mon Mar 7 12:04:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eugen Hristev X-Patchwork-Id: 549083 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 41851C433EF for ; Mon, 7 Mar 2022 12:07:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241452AbiCGMHo (ORCPT ); Mon, 7 Mar 2022 07:07:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240675AbiCGMH3 (ORCPT ); Mon, 7 Mar 2022 07:07:29 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D3D077A8F; Mon, 7 Mar 2022 04:06:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646654779; x=1678190779; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U/CKKh3POM+OwTtOgQF4Jp8Ls8i/luVYOEHzUs8doLs=; b=Em14foK0kgO6HyaQHcoGSBRtoDSIdeReXlCj+nnmnQiWFGW5AjR2Foa+ UXFBv0/I45jeTqhVJa+O7MecmEoKHmCMQFnqK2Te0vt3Y4hEmQ6RyU72o /WZotU3u9/3wKhzQmj/DkjlAbJBfqOtGT8VDI1SzkGyR4Hk7Vyo5zCtTn zR+vA52VNY519DwLBAblJZdgdml1AmmGc6oF2jRrxV81MVKLl7qjkEDgu SO9f2LUayjiETP1UQooEh6/4vF8JnU5YVwopzHhwCgjh2AtzSJPOYFl+Q cimAHFiNi3nX0HdyZzdxM7+3/Jz6GtiiTo4olse/JI8ZjdGKpa+trl7nL Q==; X-IronPort-AV: E=Sophos;i="5.90,162,1643698800"; d="scan'208";a="151090631" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Mar 2022 05:06:18 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 7 Mar 2022 05:06:17 -0700 Received: from ROB-ULT-M18282.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 7 Mar 2022 05:06:08 -0700 From: Eugen Hristev To: , CC: , , , , , , Eugen Hristev , Rob Herring Subject: [PATCH v7 10/13] dt-bindings: media: microchip, xisc: add bus-width of 14 Date: Mon, 7 Mar 2022 14:04:20 +0200 Message-ID: <20220307120423.2427631-11-eugen.hristev@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220307120423.2427631-1-eugen.hristev@microchip.com> References: <20220307120423.2427631-1-eugen.hristev@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org The Microchip XISC supports a bus width of 14 bits. Add it to the supported bus widths. Signed-off-by: Eugen Hristev Acked-by: Rob Herring --- Documentation/devicetree/bindings/media/microchip,xisc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml index 086e1430af4f..3be8f64c3e21 100644 --- a/Documentation/devicetree/bindings/media/microchip,xisc.yaml +++ b/Documentation/devicetree/bindings/media/microchip,xisc.yaml @@ -67,7 +67,7 @@ properties: remote-endpoint: true bus-width: - enum: [8, 9, 10, 11, 12] + enum: [8, 9, 10, 11, 12, 14] default: 12 hsync-active: