From patchwork Wed Feb 17 08:02:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 384673 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEE70C433DB for ; Wed, 17 Feb 2021 08:06:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9265D64E24 for ; Wed, 17 Feb 2021 08:06:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231597AbhBQIF4 (ORCPT ); Wed, 17 Feb 2021 03:05:56 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:53108 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231779AbhBQIEh (ORCPT ); Wed, 17 Feb 2021 03:04:37 -0500 Received: from localhost.localdomain (unknown [IPv6:2a01:e0a:4cb:a870:fd6e:12cd:95d7:3350]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 535071F45073; Wed, 17 Feb 2021 08:03:50 +0000 (GMT) From: Benjamin Gaignard To: ezequiel@collabora.com, p.zabel@pengutronix.de, mchehab@kernel.org, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@siol.net, krzk@kernel.org, shengjiu.wang@nxp.com, adrian.ratiu@collabora.com, aisheng.dong@nxp.com, peng.fan@nxp.com, Anson.Huang@nxp.com, hverkuil-cisco@xs4all.nl Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v1 07/18] media: hantro: Add a field to distinguish the hardware versions Date: Wed, 17 Feb 2021 09:02:55 +0100 Message-Id: <20210217080306.157876-8-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210217080306.157876-1-benjamin.gaignard@collabora.com> References: <20210217080306.157876-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Decoders hardware blocks could exist in multiple versions: add a field to distinguish them at runtime. Keep the default behavoir to be G1 hardware. Signed-off-by: Benjamin Gaignard Signed-off-by: Ezequiel Garcia Signed-off-by: Adrian Ratiu --- drivers/staging/media/hantro/hantro.h | 5 +++++ drivers/staging/media/hantro/hantro_drv.c | 2 ++ 2 files changed, 7 insertions(+) diff --git a/drivers/staging/media/hantro/hantro.h b/drivers/staging/media/hantro/hantro.h index bde65231f22f..2a566dfc2fe3 100644 --- a/drivers/staging/media/hantro/hantro.h +++ b/drivers/staging/media/hantro/hantro.h @@ -36,6 +36,9 @@ struct hantro_codec_ops; #define HANTRO_H264_DECODER BIT(18) #define HANTRO_DECODERS 0xffff0000 +#define HANTRO_G1_REV 0x6731 +#define HANTRO_G2_REV 0x6732 + /** * struct hantro_irq - irq handler and name * @@ -170,6 +173,7 @@ hantro_vdev_to_func(struct video_device *vdev) * @enc_base: Mapped address of VPU encoder register for convenience. * @dec_base: Mapped address of VPU decoder register for convenience. * @ctrl_base: Mapped address of VPU control block. + * @core_hw_dec_rev Runtime detected HW decoder core revision * @vpu_mutex: Mutex to synchronize V4L2 calls. * @irqlock: Spinlock to synchronize access to data structures * shared with interrupt handlers. @@ -189,6 +193,7 @@ struct hantro_dev { void __iomem *enc_base; void __iomem *dec_base; void __iomem *ctrl_base; + u32 core_hw_dec_rev; struct mutex vpu_mutex; /* video_device lock */ spinlock_t irqlock; diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 0570047c7fa0..e1443c394f62 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -840,6 +840,8 @@ static int hantro_probe(struct platform_device *pdev) } vpu->enc_base = vpu->reg_bases[0] + vpu->variant->enc_offset; vpu->dec_base = vpu->reg_bases[0] + vpu->variant->dec_offset; + /* by default decoder is G1 */ + vpu->core_hw_dec_rev = HANTRO_G1_REV; ret = dma_set_coherent_mask(vpu->dev, DMA_BIT_MASK(32)); if (ret) {