From patchwork Fri Apr 10 07:17:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Louis Kuo X-Patchwork-Id: 210238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, MIME_BASE64_TEXT, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C105CC2BB86 for ; Fri, 10 Apr 2020 07:17:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 97D2820692 for ; Fri, 10 Apr 2020 07:17:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="HCaRMZW4" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726671AbgDJHRo (ORCPT ); Fri, 10 Apr 2020 03:17:44 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:55079 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726650AbgDJHRo (ORCPT ); Fri, 10 Apr 2020 03:17:44 -0400 X-UUID: f31927d3540146769e684233bfe988e4-20200410 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=ygWe+eLtAFpl7pbb42yoKAd2QeY0+GuA6Di3Dh7DXzY=; b=HCaRMZW4ivGsHsJ1BJ+bY+/A8A2Nb72V8QzlxhUuMredEpdQOg5hrcwcBFhmPPoTnZLFuF579QEHykwT73qfn6++1trN7FG7cFoD9+uZ6ZIwWkV7jFT1NtNlHlOc/c3waZ6FmSApCwObVqfVW6w4MXGHJv2IAZVaSqbvdSfbybc=; X-UUID: f31927d3540146769e684233bfe988e4-20200410 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1426561054; Fri, 10 Apr 2020 15:17:38 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 10 Apr 2020 15:17:30 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 10 Apr 2020 15:17:31 +0800 From: Louis Kuo To: , , , , , CC: , , , , , , , , , , , , , Subject: [RFC PATCH V6 3/3] dts: arm64: mt8183: Add sensor interface nodes Date: Fri, 10 Apr 2020 15:17:23 +0800 Message-ID: <20200410071723.19720-4-louis.kuo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200410071723.19720-1-louis.kuo@mediatek.com> References: <20200410071723.19720-1-louis.kuo@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add nodes for Mediatek's sensor interface device. Sensor interface module embedded in Mediatek SOCs, works as a HW camera interface controller intended for image and data transmission between cameras and host devices. Signed-off-by: Louis Kuo --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 25 ++++++++++++++++++++++++ 1 file changed, 25 insertions(+) -- 2.18.0 diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 433c62efab2d..5c7bed5a6f32 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -715,5 +715,30 @@ reg = <0 0x1a000000 0 0x1000>; #clock-cells = <1>; }; + seninf: seninf@1a040000 { + compatible = "mediatek,mt8183-seninf"; + reg = <0 0x1a040000 0 0x8000>, + <0 0x11c80000 0 0x6000>; + reg-names = "base", "rx"; + interrupts = ; + power-domains = <&scpsys MT8183_POWER_DOMAIN_CAM>; + clocks = <&camsys CLK_CAM_SENINF>, + <&topckgen CLK_TOP_MUX_SENINF>; + clock-names = "clk_cam_seninf", "clk_top_mux_seninf"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@4 { + reg = <4>; + + seninf_camisp_endpoint: endpoint { + remote-endpoint = <&camisp_endpoint>; + }; + }; + }; + }; }; };