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Tue, 14 Feb 2017 07:52:19 +0000 (GMT) From: Marek Szyprowski To: linux-media@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Andrzej Hajda , Krzysztof Kozlowski , Inki Dae , Seung-Woo Kim Subject: [PATCH 11/15] media: s5p-mfc: Split variant DMA memory configuration into separate functions Date: Tue, 14 Feb 2017 08:52:04 +0100 Message-id: <1487058728-16501-12-git-send-email-m.szyprowski@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1487058728-16501-1-git-send-email-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrKIsWRmVeSWpSXmKPExsWy7djP87om2xdFGBxtELa4te4cq8Wk+xNY LM6f38Bu0bNhK6vFjPP7mCzWHrnLbnH4TTuQO/klmwOHx6ZVnWwefVtWMXp83iQXwBzFZZOS mpNZllqkb5fAlfFw1T62gnNqFRtWXGJpYHyq0MXIySEhYCLR0HiWHcIWk7hwbz1bFyMXh5DA UkaJ1uu/mSGcz4wSp+ccYYHpmLvjGwtEYhmjxIPl85kgnAYmiccLr4JVsQkYSnS97WIDsUUE nCQWzvrLDlLELPCdUeLb7tOsIAlhgXSJNV+WMYHYLAKqEj3L54E18wp4Svz/uQhqnZzEyWOT weo5geKbPk9hBBkkIfCcTeJe72OgZg4gR1Zi0wFmiHoXiSmblkLZwhKvjm+Bek5G4vLkbqiZ /YwSTa3aEPYMRolzb3khbGuJw8cvgu1iFuCTmLRtOjPEeF6JjjYhiBIPifP/L7BB2I4SVw+f gIbEHEaJO5O3sE1glFnAyLCKUSS1tDg3PbXYSK84Mbe4NC9dLzk/dxMjMHJP/zv+cQfj+xNW hxgFOBiVeHgt9i2MEGJNLCuuzD3EKMHBrCTCy9C7KEKINyWxsiq1KD++qDQntfgQozQHi5I4 754FV8KFBNITS1KzU1MLUotgskwcnFINjIar9z7bcWVX6rGCyzu27rJYf+TUZ/WDas3T5L9u +j6xU//osbM752391c4enSKuuELh+4X6WtuWtDMtBd+1H/C6CodpiwbIforapbtbaZ6T3rWq jisCYZZNX3uazh26ud/78MIHbXL7mGZvdnn6feWL3dqr5y2WMhbr9PcQt1eYJhk6U/ebDpsS S3FGoqEWc1FxIgAYg1bv2AIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xK7rm2xdFGKw8z2Zxa905VotJ9yew WJw/v4HdomfDVlaLGef3MVmsPXKX3eLwm3Ygd/JLNgcOj02rOtk8+rasYvT4vEkugDnKzSYj NTEltUghNS85PyUzL91WKTTETddCSSEvMTfVVilC1zckSEmhLDGnFMgzMkADDs4B7sFK+nYJ bhkPV+1jKzinVrFhxSWWBsanCl2MnBwSAiYSc3d8Y4GwxSQu3FvP1sXIxSEksIRRovvOT2YI p4lJYt+93cwgVWwChhJdb7vYQGwRASeJhbP+soPYzALfGSWW3UwDsYUF0iUeLF0FFmcRUJXo WT4PbAOvgKfE/5+LoLbJSZw8NpkVxOYEim/6PIURxBYS8JA4u2YH+wRG3gWMDKsYRVJLi3PT c4uN9IoTc4tL89L1kvNzNzECQ3jbsZ9bdjB2vQs+xCjAwajEw2uxb2GEEGtiWXFl7iFGCQ5m JRFeht5FEUK8KYmVValF+fFFpTmpxYcYTYGOmsgsJZqcD4yvvJJ4QxNDc0tDI2MLC3MjIyVx 3qkfroQLCaQnlqRmp6YWpBbB9DFxcEo1MJr3VHar/UmL/WHe2s9zrFTBoYdnmj9D6cWUY/Ff ful8LykwncrOrTZjpfoROc4rX9Q6LlzWOvFs7sLrDkKRea8u11n+eDF3beuLyfvdxK26Gkzu XtwsNzcgI8KlpbJsEc/jmyK80wSVTtZ27q0rs1iU2rf15nl9ocYPfMVSPr891z2P68meqsRS nJFoqMVcVJwIAAzxP353AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170214075219eucas1p193de247c3127167d68a2cca922e83fb3 X-Msg-Generator: CA X-Sender-IP: 182.198.249.180 X-Local-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1B?= =?utf-8?b?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?utf-8?q?Marek_Szyprowski=1BSRPOL-Kernel_=28TP=29=1BSam?= =?utf-8?q?sung_Electronics=1BSenior_Software_Engineer?= X-Sender-Code: =?utf-8?q?C10=1BEHQ=1BC10CD02CD027392?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20170214075219eucas1p193de247c3127167d68a2cca922e83fb3 X-RootMTR: 20170214075219eucas1p193de247c3127167d68a2cca922e83fb3 References: <1487058728-16501-1-git-send-email-m.szyprowski@samsung.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Move code for DMA memory configuration with IOMMU into separate function to make it easier to compare what is being done in each case. Signed-off-by: Marek Szyprowski --- drivers/media/platform/s5p-mfc/s5p_mfc.c | 102 ++++++++++++++++++------------- 1 file changed, 61 insertions(+), 41 deletions(-) -- 1.9.1 diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc.c b/drivers/media/platform/s5p-mfc/s5p_mfc.c index 92a88c20b26d..a18740c81c55 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc.c @@ -1107,41 +1107,13 @@ static struct device *s5p_mfc_alloc_memdev(struct device *dev, return NULL; } -static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) +static int s5p_mfc_configure_2port_memory(struct s5p_mfc_dev *mfc_dev) { struct device *dev = &mfc_dev->plat_dev->dev; void *bank2_virt; dma_addr_t bank2_dma_addr; unsigned long align_size = 1 << MFC_BASE_ALIGN_ORDER; - struct s5p_mfc_priv_buf *fw_buf = &mfc_dev->fw_buf; - - /* - * When IOMMU is available, we cannot use the default configuration, - * because of MFC firmware requirements: address space limited to - * 256M and non-zero default start address. - * This is still simplified, not optimal configuration, but for now - * IOMMU core doesn't allow to configure device's IOMMUs channel - * separately. - */ - if (exynos_is_iommu_available(dev)) { - int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE, - S5P_MFC_IOMMU_DMA_SIZE); - if (ret) - return ret; - - mfc_dev->mem_dev[BANK1_CTX] = mfc_dev->mem_dev[BANK2_CTX] = dev; - ret = s5p_mfc_alloc_firmware(mfc_dev); - if (ret) { - exynos_unconfigure_iommu(dev); - return ret; - } - - mfc_dev->dma_base[BANK1_CTX] = mfc_dev->fw_buf.dma; - mfc_dev->dma_base[BANK2_CTX] = mfc_dev->fw_buf.dma; - vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); - - return 0; - } + int ret; /* * Create and initialize virtual devices for accessing @@ -1188,26 +1160,74 @@ static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) DMA_BIT_MASK(32)); vb2_dma_contig_set_max_seg_size(mfc_dev->mem_dev[BANK2_CTX], DMA_BIT_MASK(32)); - return 0; } -static void s5p_mfc_unconfigure_dma_memory(struct s5p_mfc_dev *mfc_dev) +static void s5p_mfc_unconfigure_2port_memory(struct s5p_mfc_dev *mfc_dev) { - struct device *dev = &mfc_dev->plat_dev->dev; + device_unregister(mfc_dev->mem_dev[BANK1_CTX]); + device_unregister(mfc_dev->mem_dev[BANK2_CTX]); + vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK1_CTX]); + vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK2_CTX]); +} - s5p_mfc_release_firmware(mfc_dev); +static int s5p_mfc_configure_common_memory(struct s5p_mfc_dev *mfc_dev) +{ + struct device *dev = &mfc_dev->plat_dev->dev; + /* + * When IOMMU is available, we cannot use the default configuration, + * because of MFC firmware requirements: address space limited to + * 256M and non-zero default start address. + * This is still simplified, not optimal configuration, but for now + * IOMMU core doesn't allow to configure device's IOMMUs channel + * separately. + */ + int ret = exynos_configure_iommu(dev, S5P_MFC_IOMMU_DMA_BASE, + S5P_MFC_IOMMU_DMA_SIZE); + if (ret) + return ret; - if (exynos_is_iommu_available(dev)) { + mfc_dev->mem_dev[BANK1_CTX] = mfc_dev->mem_dev[BANK2_CTX] = dev; + ret = s5p_mfc_alloc_firmware(mfc_dev); + if (ret) { exynos_unconfigure_iommu(dev); - vb2_dma_contig_clear_max_seg_size(dev); - return; + return ret; } - device_unregister(mfc_dev->mem_dev[BANK1_CTX]); - device_unregister(mfc_dev->mem_dev[BANK2_CTX]); - vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK1_CTX]); - vb2_dma_contig_clear_max_seg_size(mfc_dev->mem_dev[BANK2_CTX]); + mfc_dev->dma_base[BANK1_CTX] = mfc_dev->fw_buf.dma; + mfc_dev->dma_base[BANK2_CTX] = mfc_dev->fw_buf.dma; + vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); + + return 0; +} + +static void s5p_mfc_unconfigure_common_memory(struct s5p_mfc_dev *mfc_dev) +{ + struct device *dev = &mfc_dev->plat_dev->dev; + + exynos_unconfigure_iommu(dev); + vb2_dma_contig_clear_max_seg_size(dev); +} + +static int s5p_mfc_configure_dma_memory(struct s5p_mfc_dev *mfc_dev) +{ + struct device *dev = &mfc_dev->plat_dev->dev; + + if (exynos_is_iommu_available(dev)) + return s5p_mfc_configure_common_memory(mfc_dev); + else + return s5p_mfc_configure_2port_memory(mfc_dev); +} + +static void s5p_mfc_unconfigure_dma_memory(struct s5p_mfc_dev *mfc_dev) +{ + struct device *dev = &mfc_dev->plat_dev->dev; + + s5p_mfc_release_firmware(mfc_dev); + if (exynos_is_iommu_available(dev)) + s5p_mfc_unconfigure_common_memory(mfc_dev); + else + s5p_mfc_unconfigure_2port_memory(mfc_dev); } /* MFC probe function */