| Message ID | 20250212120536.28879-1-quic_jseerapu@quicinc.com |
|---|---|
| Headers | show |
| Series | Add Block event interrupt support for I2C protocol | expand |
On 2/12/2025 5:35 PM, Jyothi Kumar Seerapu wrote: > GSI hardware generates an interrupt for each transfer completion. > For multiple messages within a single transfer, this results in > N interrupts for N messages, leading to significant software > interrupt latency. > > To mitigate this latency, utilize Block Event Interrupt (BEI) mechanism. > Enabling BEI instructs the GSI hardware to prevent interrupt generation > and BEI is disabled when an interrupt is necessary. > > When using BEI, consider splitting a single multi-message transfer into > chunks of 8 messages internally and so interrupts are not expected for > the first 7 message completions, only the last message triggers > an interrupt, indicating the completion of 8 messages. > > This BEI mechanism enhances overall transfer efficiency. > Acked-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com> > Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com> > --- > > v4 -> v5: > - BEI flag naming changed from flags to bei_flag. > - QCOM_GPI_BLOCK_EVENT_IRQ macro is removed from qcom-gpi-dma.h > file, and Block event interrupt support is checked with bei_flag. > > v3 -> v4: > - API's added for Block event interrupt with multi descriptor support for > I2C is moved from qcom-gpi-dma.h file to I2C geni qcom driver file. > - gpi_multi_xfer_timeout_handler function is moved from GPI driver to > I2C driver. > > v2-> v3: > - Renamed gpi_multi_desc_process to gpi_multi_xfer_timeout_handler > - MIN_NUM_OF_MSGS_MULTI_DESC changed from 4 to 2 > - Added documentation for newly added changes in "qcom-gpi-dma.h" file > - Updated commit description. > > v1 -> v2: > - Changed dma_addr type from array of pointers to array. > - To support BEI functionality with the TRE size of 64 defined in GPI driver, > updated QCOM_GPI_MAX_NUM_MSGS to 16 and NUM_MSGS_PER_IRQ to 4. > > drivers/dma/qcom/gpi.c | 3 +++ > include/linux/dma/qcom-gpi-dma.h | 2 ++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c > index 52a7c8f2498f..d925a8156317 100644 > --- a/drivers/dma/qcom/gpi.c > +++ b/drivers/dma/qcom/gpi.c > @@ -1693,6 +1693,9 @@ static int gpi_create_i2c_tre(struct gchan *chan, struct gpi_desc *desc, > > tre->dword[3] = u32_encode_bits(TRE_TYPE_DMA, TRE_FLAGS_TYPE); > tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_IEOT); > + > + if (i2c->bei_flag) > + tre->dword[3] |= u32_encode_bits(1, TRE_FLAGS_BEI); > } > > for (i = 0; i < tre_idx; i++) > diff --git a/include/linux/dma/qcom-gpi-dma.h b/include/linux/dma/qcom-gpi-dma.h > index 6680dd1a43c6..1060b7eac305 100644 > --- a/include/linux/dma/qcom-gpi-dma.h > +++ b/include/linux/dma/qcom-gpi-dma.h > @@ -65,6 +65,7 @@ enum i2c_op { > * @rx_len: receive length for buffer > * @op: i2c cmd > * @muli-msg: is part of multi i2c r-w msgs > + * @bei_flag: true for block event interrupt support > */ > struct gpi_i2c_config { > u8 set_config; > @@ -78,6 +79,7 @@ struct gpi_i2c_config { > u32 rx_len; > enum i2c_op op; > bool multi_msg; > + bool bei_flag; > }; > > #endif /* QCOM_GPI_DMA_H */
The I2C driver gets an interrupt upon transfer completion. When handling multiple messages in a single transfer, this results in N interrupts for N messages, leading to significant software interrupt latency. To mitigate this latency, utilize Block Event Interrupt (BEI) mechanism. Enabling BEI instructs the hardware to prevent interrupt generation and BEI is disabled when an interrupt is necessary. Large I2C transfer can be divided into chunks of 8 messages internally. Interrupts are not expected for the first 7 message completions, only the last message triggers an interrupt, indicating the completion of 8 messages. This BEI mechanism enhances overall transfer efficiency. This optimization reduces transfer time from 168 ms to 48 ms for a series of 200 I2C write messages in a single transfer, with a clock frequency support of 100 kHz. BEI optimizations are currently implemented for I2C write transfers only, as there is no use case for multiple I2C read messages in a single transfer at this time. v4 -> v5: - BEI flag naming changed from flags to bei_flag. - QCOM_GPI_BLOCK_EVENT_IRQ macro is removed from qcom-gpi-dma.h file, and Block event support is checked with bei_flag. - Documentation added for "struct geni_i2c_dev". v3 -> v4: - API's added for Block event interrupt with multi descriptor support is moved from qcom-gpi-dma.h file to I2C geni qcom driver file. - gpi_multi_xfer_timeout_handler function is moved from GPI driver to I2C driver. - geni_i2c_gpi_multi_desc_xfer structure is added as a member of struct geni_i2c_dev. - Removed the changes of making I2C driver is dependent on GPI driver. v2 -> v3: - Updated commit description - In I2C GENI driver, for i2c_gpi_cb_result moved the logic of "!is_tx_multi_xfer" to else part. - MIN_NUM_OF_MSGS_MULTI_DESC changed from 4 to 2 - Changes of I2C GENI driver to depend on the GPI driver moved to patch3. - Renamed gpi_multi_desc_process to gpi_multi_xfer_timeout_handler - Added description for newly added changes in "qcom-gpi-dma.h" file. v1 -> v2: - DT changes are reverted for adding dma channel size as a new arg of dma-cells property. - DT binding change reveted for dma channel size as a new arg of dma-cells property. - In GPI driver, reverted the changes to parse the channel TRE size from device tree. - Made the changes in QCOM I2C geni driver to support the BEI functionality with the existing TRE size of 64. - Made changes in QCOM I2C geni driver as per the review comments. - Fixed Kernel test robot reported compiltion issues. Jyothi Kumar Seerapu (2): dmaengine: qcom: gpi: Add GPI Block event interrupt support i2c: i2c-qcom-geni: Add Block event interrupt support drivers/dma/qcom/gpi.c | 3 + drivers/i2c/busses/i2c-qcom-geni.c | 304 ++++++++++++++++++++++++++--- include/linux/dma/qcom-gpi-dma.h | 2 + 3 files changed, 284 insertions(+), 25 deletions(-)