From patchwork Tue May 9 04:44:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 680412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7730BC77B7C for ; Tue, 9 May 2023 04:45:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234507AbjEIEpD (ORCPT ); Tue, 9 May 2023 00:45:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33426 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229557AbjEIEpB (ORCPT ); Tue, 9 May 2023 00:45:01 -0400 Received: from NAM04-BN8-obe.outbound.protection.outlook.com (mail-bn8nam04on2085.outbound.protection.outlook.com [40.107.100.85]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47A9F7AAE; Mon, 8 May 2023 21:45:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HfLxso3lpoVgEJXIvP8RrlqF4M2yyXHc3sFpHdAMU0SKdHtZVlbpR+utopEY451ClBiFK7N/VmOc8zpHnuxZhgp/bisA3fkaJR2uuLR8asihzElYQQ51rCqplQvkViS8V47dRgnk5KXUk5v7D4RbxngjA2FmKNe5AqUSXwcf8Ykp7GENBikuIwYZlXxHLcUscLSrQc61xZBM+FmCcTqUAwoYzlvANGs/zza8ekHnwLYuurSeVOR1uLfZlhXLepiY5HT57YgcuztyvuifJHvcN4Ff/VHYfrpXj9IixZVFYBZnifGtqrTk75rqT16UhqsP8+z9o8wvuLj3pJk7pWS1pA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=2NYdUJEXpywf+zdQPOocEyC5wWJhiEXVpeGoZ+OlqWA=; b=diWO1Jn09sNJx0Z8FgFjk6TZGACE6+CnZWiuvES7AffZSq7VqACReY/QYEIGtHYiffFNwJxpQ1NJkddiKMWr/iSL3Y1WR36Oc7GxWoTNLUswGa3dqViHDcNFERMtMVQrZ98L37ttf1iSCndtDLfYWnnsxR71825UK4taZXyOgrZxBfO0TCSYnQ+lHqyQF65q4HOH0z7JUB0oZpUnWAD7CocoK9fI2Fs6+lBVSla/7O9wlwJdEsyoeAEc2XTAEoA5mZEbf0j4iJ9PzJGfiPRb495xiBCq4BIZMrlC55wDG9a9oQylaTg0SByQ6oxnMLR8P6qAHE+FNYCV5jZcex2z7g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.232) smtp.rcpttodomain=intel.com smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2NYdUJEXpywf+zdQPOocEyC5wWJhiEXVpeGoZ+OlqWA=; b=NKoId0Ckv4d8GOp93CDV0DzXVs0SkImyFTz96dsovFS5fRy7b0w1THFXcvtjIriIjDsY/GOFEFLMP6pA4pURDGzY8HhusPix7tH0YzSZE+GoRXKS4kDuNyLCeGtg1W2dk+/7XpU2gR3EiyJj9SqVaK3/GjIM3NIzfcEHFrQVmQ+I0/HmQ+1umYO/+rCkvOSayhSmqDObmTPJna7rc0mO9g2PNGh0XCy98TNsDdhsIaw210NbuvjeLzGkdxbj31yyAcEoSsCl3MchlUjnueRTKPDSgw4eSdXhAXQ0M8NC1+UYSC4rIsUMawlOGkHQ0Ej516qXMEWdhWuDxJr8FyUmoA== Received: from BN0PR03CA0027.namprd03.prod.outlook.com (2603:10b6:408:e6::32) by CH3PR12MB8329.namprd12.prod.outlook.com (2603:10b6:610:12e::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.31; Tue, 9 May 2023 04:44:58 +0000 Received: from BN8NAM11FT081.eop-nam11.prod.protection.outlook.com (2603:10b6:408:e6:cafe::57) by BN0PR03CA0027.outlook.office365.com (2603:10b6:408:e6::32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.33 via Frontend Transport; Tue, 9 May 2023 04:44:58 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.232) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.232 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.232; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.232) by BN8NAM11FT081.mail.protection.outlook.com (10.13.177.233) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6363.33 via Frontend Transport; Tue, 9 May 2023 04:44:57 +0000 Received: from drhqmail201.nvidia.com (10.126.190.180) by mail.nvidia.com (10.127.129.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.5; Mon, 8 May 2023 21:44:44 -0700 Received: from drhqmail201.nvidia.com (10.126.190.180) by drhqmail201.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.37; Mon, 8 May 2023 21:44:43 -0700 Received: from Asurada-Nvidia.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.986.37 via Frontend Transport; Mon, 8 May 2023 21:44:43 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , Subject: [PATCH v7 3/4] iommufd/selftest: Add IOMMU_TEST_OP_ACCESS_REPLACE_IOAS coverage Date: Mon, 8 May 2023 21:44:13 -0700 Message-ID: X-Mailer: git-send-email 2.40.1 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT081:EE_|CH3PR12MB8329:EE_ X-MS-Office365-Filtering-Correlation-Id: 939c83e7-dfb1-420c-c823-08db5048243d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 211XZKw81Ygd1oe2f3wa+MXTn1RG/wHrKZmZmvSI7EiPj8kEmGct+qcOQM5ka8Uo00NTQFbVi7gWo3MOSsNxOZ6/ZnYmvSq9cA66OeG8GOAt8DDRj3pj59DvonDNv9yvm80LROQeLAcu7qElvAzBeVNDD5omXoIf0XF26YzIwzSUleJKIslMoeWRx6nc9TciGMTQwnQqWr/9LHvp+Ys7P1liHfMhY7HL66CSb1D6ajrnjQOIiJYgnr1KyHIOf7h4z1R/mTaRc7pxSLOdquC+8mHL8gblc76CKcKq1DM6JFqjcBLyedDNs2GoHRU3ah/KIdjUfb/onybigROkcK/hmgQcSQSbJG8ZUc/ui9MDJODLtJXIzWnuSvAx5ipX6e6Nb0IEc1Av3+AAM7ohhyk+ZVpM90wEKeauNU59ebTSsqXBb1hzN14/dAH2g/8E3A+26yuN1yhrmj94MqiTGOl3S0zTkqyIwf7NWfnspYPfYzK7yLjpzteQG2/Dd+Q2nR05KRh3lelqsdd22Zw6zBP0IkmzjCnLeaTfaGJqa8/KIUy8rML52ZOijyt6Xd1vqlvN2UqYV12ZcwLzu5R9V+By+BiStcGgRc0Iv5NQcNM6RBQbPrnPwvY+Ijbudv7k5ZLmRe3gFC9Z6FRMsdLhfEqAuF3H1+I02zJjmDjlLiR0IneY+R5Sj3Au7dfVU5rUpLkYL/ORN1PPBtkQ07i3WR3Qow== X-Forefront-Antispam-Report: CIP:216.228.118.232; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge1.nvidia.com; CAT:NONE; SFS:(13230028)(4636009)(136003)(376002)(396003)(39860400002)(346002)(451199021)(46966006)(40470700004)(36840700001)(2906002)(54906003)(8936002)(316002)(478600001)(8676002)(5660300002)(4326008)(110136005)(41300700001)(6666004)(70586007)(7416002)(70206006)(7696005)(26005)(186003)(356005)(82740400003)(40460700003)(2616005)(36860700001)(36756003)(336012)(83380400001)(426003)(47076005)(82310400005)(40480700001)(86362001)(7636003); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 May 2023 04:44:57.7078 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 939c83e7-dfb1-420c-c823-08db5048243d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.232]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT081.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8329 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org Add a new IOMMU_TEST_OP_ACCESS_REPLACE_IOAS to allow replacing the access->ioas, corresponding to the iommufd_access_replace() helper. Then add a replace coverage as a part of user_copy test case, which basically repeats the copy test after replacing the old ioas with a new one. Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 4 +++ drivers/iommu/iommufd/selftest.c | 19 ++++++++++++ tools/testing/selftests/iommu/iommufd.c | 29 +++++++++++++++++-- tools/testing/selftests/iommu/iommufd_utils.h | 19 ++++++++++++ 4 files changed, 69 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/iommufd_test.h index dd9168a20ddf..258de2253b61 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -18,6 +18,7 @@ enum { IOMMU_TEST_OP_ACCESS_RW, IOMMU_TEST_OP_SET_TEMP_MEMORY_LIMIT, IOMMU_TEST_OP_MOCK_DOMAIN_REPLACE, + IOMMU_TEST_OP_ACCESS_REPLACE_IOAS, }; enum { @@ -91,6 +92,9 @@ struct iommu_test_cmd { struct { __u32 limit; } memory_limit; + struct { + __u32 ioas_id; + } access_replace_ioas; }; __u32 last; }; diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selftest.c index 9d43334e4faf..bb2cd54ca7b6 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -785,6 +785,22 @@ static int iommufd_test_create_access(struct iommufd_ucmd *ucmd, return rc; } +static int iommufd_test_access_replace_ioas(struct iommufd_ucmd *ucmd, + unsigned int access_id, + unsigned int ioas_id) +{ + struct selftest_access *staccess; + int rc; + + staccess = iommufd_access_get(access_id); + if (IS_ERR(staccess)) + return PTR_ERR(staccess); + + rc = iommufd_access_replace(staccess->access, ioas_id); + fput(staccess->file); + return rc; +} + /* Check that the pages in a page array match the pages in the user VA */ static int iommufd_test_check_pages(void __user *uptr, struct page **pages, size_t npages) @@ -1000,6 +1016,9 @@ int iommufd_test(struct iommufd_ucmd *ucmd) case IOMMU_TEST_OP_CREATE_ACCESS: return iommufd_test_create_access(ucmd, cmd->id, cmd->create_access.flags); + case IOMMU_TEST_OP_ACCESS_REPLACE_IOAS: + return iommufd_test_access_replace_ioas( + ucmd, cmd->id, cmd->access_replace_ioas.ioas_id); case IOMMU_TEST_OP_ACCESS_PAGES: return iommufd_test_access_pages( ucmd, cmd->id, cmd->access_pages.iova, diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selftests/iommu/iommufd.c index dc09c1de319f..8acd0af37aa5 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -1283,7 +1283,13 @@ TEST_F(iommufd_mock_domain, user_copy) .dst_iova = MOCK_APERTURE_START, .length = BUFFER_SIZE, }; - unsigned int ioas_id; + struct iommu_ioas_unmap unmap_cmd = { + .size = sizeof(unmap_cmd), + .ioas_id = self->ioas_id, + .iova = MOCK_APERTURE_START, + .length = BUFFER_SIZE, + }; + unsigned int new_ioas_id, ioas_id; /* Pin the pages in an IOAS with no domains then copy to an IOAS with domains */ test_ioctl_ioas_alloc(&ioas_id); @@ -1301,11 +1307,30 @@ TEST_F(iommufd_mock_domain, user_copy) ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_COPY, ©_cmd)); check_mock_iova(buffer, MOCK_APERTURE_START, BUFFER_SIZE); + /* Now replace the ioas with a new one */ + test_ioctl_ioas_alloc(&new_ioas_id); + test_ioctl_ioas_map_id(new_ioas_id, buffer, BUFFER_SIZE, + ©_cmd.src_iova); + test_cmd_access_replace_ioas(access_cmd.id, new_ioas_id); + + /* Destroy the old ioas and cleanup copied mapping */ + ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_UNMAP, &unmap_cmd)); + test_ioctl_destroy(ioas_id); + + /* Then run the same test again with the new ioas */ + access_cmd.access_pages.iova = copy_cmd.src_iova; + ASSERT_EQ(0, + ioctl(self->fd, _IOMMU_TEST_CMD(IOMMU_TEST_OP_ACCESS_PAGES), + &access_cmd)); + copy_cmd.src_ioas_id = new_ioas_id; + ASSERT_EQ(0, ioctl(self->fd, IOMMU_IOAS_COPY, ©_cmd)); + check_mock_iova(buffer, MOCK_APERTURE_START, BUFFER_SIZE); + test_cmd_destroy_access_pages( access_cmd.id, access_cmd.access_pages.out_access_pages_id); test_cmd_destroy_access(access_cmd.id); - test_ioctl_destroy(ioas_id); + test_ioctl_destroy(new_ioas_id); } TEST_F(iommufd_mock_domain, replace) diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/selftests/iommu/iommufd_utils.h index 53b4d3f2d9fc..70353e68e599 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -119,6 +119,25 @@ static int _test_cmd_hwpt_alloc(int fd, __u32 device_id, __u32 pt_id, #define test_cmd_hwpt_alloc(device_id, pt_id, hwpt_id) \ ASSERT_EQ(0, _test_cmd_hwpt_alloc(self->fd, device_id, pt_id, hwpt_id)) +static int _test_cmd_access_replace_ioas(int fd, __u32 access_id, + unsigned int ioas_id) +{ + struct iommu_test_cmd cmd = { + .size = sizeof(cmd), + .op = IOMMU_TEST_OP_ACCESS_REPLACE_IOAS, + .id = access_id, + .access_replace_ioas = { .ioas_id = ioas_id }, + }; + int ret; + + ret = ioctl(fd, IOMMU_TEST_CMD, &cmd); + if (ret) + return ret; + return 0; +} +#define test_cmd_access_replace_ioas(access_id, ioas_id) \ + ASSERT_EQ(0, _test_cmd_access_replace_ioas(self->fd, access_id, ioas_id)) + static int _test_cmd_create_access(int fd, unsigned int ioas_id, __u32 *access_id, unsigned int flags) {