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Tue, 3 Dec 2024 14:10:49 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , Subject: [PATCH v2 13/13] iommu/arm-smmu-v3: Report IRQs that belong to devices attached to vIOMMU Date: Tue, 3 Dec 2024 14:10:18 -0800 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002327:EE_|MN0PR12MB6368:EE_ X-MS-Office365-Filtering-Correlation-Id: d65dd2f3-5871-48a6-b8db-08dd13e7632f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|36860700013|1800799024|376014|7416014; X-Microsoft-Antispam-Message-Info: DMYnNgn16M/Zj6hyLLqw5/z+WQTLnfFFnXAJopquRDTnGxHgE6VMgcGuZjJyag2q9lrNey7WFPglrw0FkgDkqfWOGU1dvKpKvpdrG2Wup1L7KcMYCnJG4utLNTnrXqv7lGpRezugXIMnlD55sv7FMfO2dMG2h/Pl1X9wIAXbOBcrmuxPXCS2dLeLQ9SriXdRIE00jfAM/WyNcs6yLUS8PWw7rSUpNue09QYkSpQ44vMjPj8JkPTVUjmbcydGRSwkOh2kTBSkShv2DadUsUMswHK11nuER0f1PxwVY1vg5/MfZ4iZ6aHh8Mj0DLKR+aChCKexEnrHawyedfCzIWq7rzglBznJHpqsqf4/XeGggGAk1dxPjB9STCOkihB9ODSu7dM+5MOCZyLPcLOto1ukRsUV9JMhYAbq4PU6AU3NQv1l093JrP/U5A8lrQGoHPewCO2s4ixMM64UfTE+YYY+3HBk5CchtB6Gq5rlW4CDOXvk9N/hl8QfMMK2RjtXPeEx9GVpHG/K9+GAZFJd/BofiwvSzSl32Jt0xKZftexhOPOmlLu346gr1HCf3sa7IeT/QPILLpT8/oxHKWzSxASKSUQ+6ErFyj/c8VIBaOphRWYgQiEupwItTKy9ByiTiZRSe/Q2o4cREPufGvapUZLa4LAswbfWI40SrRFcMq/8hw7eV0Bhe9ZfFa9onLThOTZvCYEBmUpnJ0gTR03l1M7nbTqEhaaJoXNwkrM89acaRalHpKyZ8QxhIj6w11a2CSSUjMcPkioDqa+dT4I2VBe44U9XtO4FUBocu/zhaWPb0+CEMBIzvK7PbTiFw5nqBro4BY7+OkDlajs0zreYuMbj7/Yx4OnFCaEYm2BalelZIuQtyn4ToBNF5akqPGpXd6jk01DNWUwVwP6COu7exWPEzGvnDETTS+YFawwzvAPD8syf400OkeRJY/MmG/Efhgh7PMBKW2W8zo8Zp6ysmFvCgVv7lGpx1Ogi27EKaFDtT2LAd7NwabibHcCgpQGmv/YCufucGVpeTWGG+8vGxxx4P2465WkdvXCfK0T8LOSgtY5IpVQ7iQM8/bUGnP3/MlIa9Vw6ddn0uZnP81LKWQo7aaPJQYIpHAkNl2oDXB6hBhiCOlu6VZ9GGgrJv324P5Gs796Hnpwa8VN68f/E3jXNE4wrrzEekO4CjjtfN3gZG65CjC8wdf3vCP1GH70PXSQF1klN6ZCeLuNu51cyoAl3bZA7mgpdY28SsbSTRMV05j53RyaCj5LAJR2a3dpjMs6ugs1AJAn30CZyQQBkI4495+q2uG6BSpt4woBIaa+U+iUClO4QrYCqxXIopYqx/vv66kjTfkgWXXq6bAW0AOz/OJTerrD0yEGuz1xb0R6o1DQ2Hd6b4wEgg1iYn1gtOqFuQkj54BaxFeWYYRlCjEWF2826fPITd1HO1Kh420tLW8txnqVk+BOZ0c7jhFFwucPQ X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230040)(82310400026)(36860700013)(1800799024)(376014)(7416014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Dec 2024 22:11:07.8610 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d65dd2f3-5871-48a6-b8db-08dd13e7632f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002327.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6368 Aside from the IOPF framework, iommufd provides an additional pathway to report a hardware event or IRQ, via the vIRQ of vIOMMU infrastructure. Define an iommu_virq_arm_smmuv3 uAPI structure, and report stage-1 faults in the threaded IRQ handler. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 7 +++ include/uapi/linux/iommufd.h | 14 +++++ .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 16 +++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 62 ++++++++++--------- 4 files changed, 71 insertions(+), 28 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index ec7cff33a0b1..05915f141eb8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -1037,6 +1037,7 @@ struct iommufd_viommu *arm_vsmmu_alloc(struct device *dev, int arm_smmu_attach_prepare_vmaster(struct arm_smmu_attach_state *state, struct iommu_domain *domain); void arm_smmu_attach_commit_vmaster(struct arm_smmu_attach_state *state); +int arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt); #else #define arm_smmu_hw_info NULL #define arm_vsmmu_alloc NULL @@ -1052,6 +1053,12 @@ static inline void arm_smmu_attach_commit_vmaster(struct arm_smmu_attach_state *state) { } + +static inline int +arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt) +{ + return -EOPNOTSUPP; +} #endif /* CONFIG_ARM_SMMU_V3_IOMMUFD */ #endif /* _ARM_SMMU_V3_H */ diff --git a/include/uapi/linux/iommufd.h b/include/uapi/linux/iommufd.h index d9319f5b7c69..164920d7f0ab 100644 --- a/include/uapi/linux/iommufd.h +++ b/include/uapi/linux/iommufd.h @@ -1016,9 +1016,23 @@ struct iommu_ioas_change_process { /** * enum iommu_virq_type - Virtual IRQ Type * @IOMMU_VIRQ_TYPE_NONE: INVALID type + * @IOMMU_VIRQ_TYPE_ARM_SMMUV3: ARM SMMUv3 Virtual Event */ enum iommu_virq_type { IOMMU_VIRQ_TYPE_NONE = 0, + IOMMU_VIRQ_TYPE_ARM_SMMUV3 = 1, +}; + +/** + * struct iommu_virq_arm_smmuv3 - ARM SMMUv3 Virtual IRQ + * (IOMMU_VIRQ_TYPE_ARM_SMMUV3) + * @evt: 256-bit ARM SMMUv3 Event record, little-endian. + * + * StreamID field reports a virtual device ID. To receive a virtual IRQ for a + * device, a vDEVICE must be allocated via IOMMU_VDEVICE_ALLOC. + */ +struct iommu_virq_arm_smmuv3 { + __aligned_le64 evt[4]; }; /** diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c index 3a77eca949e6..e3ef77e0bffd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-iommufd.c @@ -447,4 +447,20 @@ struct iommufd_viommu *arm_vsmmu_alloc(struct device *dev, return &vsmmu->core; } +int arm_vmaster_report_event(struct arm_smmu_vmaster *vmaster, u64 *evt) +{ + struct iommu_virq_arm_smmuv3 virq_data = + *(struct iommu_virq_arm_smmuv3 *)evt; + + virq_data.evt[0] &= ~EVTQ_0_SID; + virq_data.evt[0] |= FIELD_PREP(EVTQ_0_SID, vmaster->vsid); + + virq_data.evt[0] = cpu_to_le64(virq_data.evt[0]); + virq_data.evt[1] = cpu_to_le64(virq_data.evt[1]); + + return iommufd_viommu_report_irq(&vmaster->vsmmu->core, + IOMMU_VIRQ_TYPE_ARM_SMMUV3, &virq_data, + sizeof(virq_data)); +} + MODULE_IMPORT_NS(IOMMUFD); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 6a6113b36360..215c2d811eb7 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -1779,33 +1779,6 @@ static int arm_smmu_handle_evt(struct arm_smmu_device *smmu, u64 *evt) return -EOPNOTSUPP; } - if (!(evt[1] & EVTQ_1_STALL)) - return -EOPNOTSUPP; - - if (evt[1] & EVTQ_1_RnW) - perm |= IOMMU_FAULT_PERM_READ; - else - perm |= IOMMU_FAULT_PERM_WRITE; - - if (evt[1] & EVTQ_1_InD) - perm |= IOMMU_FAULT_PERM_EXEC; - - if (evt[1] & EVTQ_1_PnU) - perm |= IOMMU_FAULT_PERM_PRIV; - - flt->type = IOMMU_FAULT_PAGE_REQ; - flt->prm = (struct iommu_fault_page_request) { - .flags = IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE, - .grpid = FIELD_GET(EVTQ_1_STAG, evt[1]), - .perm = perm, - .addr = FIELD_GET(EVTQ_2_ADDR, evt[2]), - }; - - if (ssid_valid) { - flt->prm.flags |= IOMMU_FAULT_PAGE_REQUEST_PASID_VALID; - flt->prm.pasid = FIELD_GET(EVTQ_0_SSID, evt[0]); - } - mutex_lock(&smmu->streams_mutex); master = arm_smmu_find_master(smmu, sid); if (!master) { @@ -1813,7 +1786,40 @@ static int arm_smmu_handle_evt(struct arm_smmu_device *smmu, u64 *evt) goto out_unlock; } - ret = iommu_report_device_fault(master->dev, &fault_evt); + down_read(&master->vmaster_rwsem); + if (evt[1] & EVTQ_1_STALL) { + if (evt[1] & EVTQ_1_RnW) + perm |= IOMMU_FAULT_PERM_READ; + else + perm |= IOMMU_FAULT_PERM_WRITE; + + if (evt[1] & EVTQ_1_InD) + perm |= IOMMU_FAULT_PERM_EXEC; + + if (evt[1] & EVTQ_1_PnU) + perm |= IOMMU_FAULT_PERM_PRIV; + + flt->type = IOMMU_FAULT_PAGE_REQ; + flt->prm = (struct iommu_fault_page_request){ + .flags = IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE, + .grpid = FIELD_GET(EVTQ_1_STAG, evt[1]), + .perm = perm, + .addr = FIELD_GET(EVTQ_2_ADDR, evt[2]), + }; + + if (ssid_valid) { + flt->prm.flags |= IOMMU_FAULT_PAGE_REQUEST_PASID_VALID; + flt->prm.pasid = FIELD_GET(EVTQ_0_SSID, evt[0]); + } + + ret = iommu_report_device_fault(master->dev, &fault_evt); + } else if (master->vmaster && !(evt[1] & EVTQ_1_S2)) { + ret = arm_vmaster_report_event(master->vmaster, evt); + } else { + /* Unhandled events should be pinned */ + ret = -EFAULT; + } + up_read(&master->vmaster_rwsem); out_unlock: mutex_unlock(&smmu->streams_mutex); return ret;