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Tue, 5 Nov 2024 12:05:30 -0800 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v7 03/10] iommu/viommu: Add cache_invalidate to iommufd_viommu_ops Date: Tue, 5 Nov 2024 12:05:11 -0800 Message-ID: <90138505850fa6b165135e78a87b4cc7022869a4.1730836308.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0002992D:EE_|MW4PR12MB6897:EE_ X-MS-Office365-Filtering-Correlation-Id: e7af19e7-953b-4b33-f67f-08dcfdd53fbf X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|376014|1800799024|7416014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: mY7TJxSCdlWOPytaxh/TKTJl6Uo+4oCChmKhBLh8SGhztNZnwCJvbDVe2Z4lg6DQbARLBUrWXXzmalMkJu2xJLAHBeLEB5y83B8O/cGGl5sgI2FrOdRxb0qPvDtizGRf7uLNP+rUAMgl9TqY5Vrf+DYFs4I/5Zx+q2O4RcEA7FW4wAGRvlOADVJ1wAlpss3sT55vgJeHM3plEasoAJDz8/yODO0DSsFVMjOhvfYNlQtaVaa7hI/XUf1ZfCf4uk/tYel/EufnsSOQaG5OXeTkgjhTRkFZP52J5vsd0HIyx/pd3GUmc4f8aOgvEe3a9NmuLKHjQcB7ZM6EnQvE82lmjOV5QRcvA61Y3LRPJreHuohZZ9LkDSxN1tFuNGD+OHS13s5yJFd9LsNF4XdGa89Q92QWlMrz3hQJsrUOGKol23aXUVnEBt5nN95baD24555L1WUc8TmbpKYYlWxxIH193H+xaHNZT/VnkBvIeRNTSEHA0QrcDLnrjR1Y+b58ntJnaJKcHDUsi4wnttDsyWW7PhzkEs5L8p2ebRw/Nw2vWD7jpCSV+ci03s9POoeqZBbrdY97pnh4hwluOz33uuqE9AYRVta3/LwxC5nsZiXKZC0pvv8yFdbSLcjs8wpOaaHF2JDIwT0PWynWO15LLoHebPuHFsx4YQHebyyzocgxOrhFD9A/QwyO7SNcksL/qdEC5K2vJc8swZYKG5UYiCCzikDWXriBE3CWphQDuW4GFAu/8ypLK0PIBQh+/dTjYjjf2yD7b+rWQyCGi0PLzvNFDi2oMwWX8IulEG0F6Z7Kgg5IrNcID9icTSr9JCNKCwqQD0N04i76+5IjbCIW6R5EhPuX8ioTpdNwzUFKBML08IlwgM0/3wEgbNYo/GQI5OKUswSk2tZsTUUCo+0zwDKtFp0pQhdPWbDF25OoEWEOTRHF3dsXlIXeWXHZcnbeKc4bfEM/p/erImHkddcjllinozLQIB6oo64znr3gr5RCpwsdygZOR+JGVwInKH1bhBko1Efk7iwnwie4J7i+V/u2UGNHO07hau4gbDqBR7NgtmW6EQmQxn3Dx9iB9m5hP4xlKNMT3vbwy83op8GF3fkxJ3J3ATH2l1mR9R+E87FJMZ7+2SOLjahjjkcdryD4BFlKMmWqDn6AUnwKirZ9Ao5NdPrFd5VG0ioAnpCEGQ9j/b9rioBb4dOiI+dahj/luBqbcB2HcyMgYP1OHdKJFfviJ34VQOGl20eMzhb6KPEdostPvpy/G7xpKlxBK/H9EBX7BABdkEgvw7dT5INuOBeqyuX6GE5OzJ9uQF3VHecVn1sCxWI+V5C3twvENQFEmG4efdmPrXw1aGTExbY7PfesFIE1L2s4d4+IEXCEISHzLuBBmfSDj2ghL7c7HeFxHUJOQUQK1Pi4YrE64gRsWBC8qQ== X-Forefront-Antispam-Report: CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(376014)(1800799024)(7416014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Nov 2024 20:05:51.6674 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e7af19e7-953b-4b33-f67f-08dcfdd53fbf X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992D.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB6897 This per-vIOMMU cache_invalidate op is like the cache_invalidate_user op in struct iommu_domain_ops, but wider, supporting device cache (e.g. PCI ATC invaldiations). Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian Signed-off-by: Nicolin Chen --- include/linux/iommufd.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 71fa1e343023..2bc735ff9511 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -16,6 +16,7 @@ struct device; struct file; struct iommu_group; struct iommu_user_data; +struct iommu_user_data_array; struct iommufd_access; struct iommufd_ctx; struct iommufd_device; @@ -105,12 +106,21 @@ struct iommufd_viommu { * must be defined in include/uapi/linux/iommufd.h. * It must fully initialize the new iommu_domain before * returning. Upon failure, ERR_PTR must be returned. + * @cache_invalidate: Flush hardware cache used by a vIOMMU. It can be used for + * any IOMMU hardware specific cache: TLB and device cache. + * The @array passes in the cache invalidation requests, in + * form of a driver data structure. A driver must update the + * array->entry_num to report the number of handled requests. + * The data structure of the array entry must be defined in + * include/uapi/linux/iommufd.h */ struct iommufd_viommu_ops { void (*destroy)(struct iommufd_viommu *viommu); struct iommu_domain *(*alloc_domain_nested)( struct iommufd_viommu *viommu, u32 flags, const struct iommu_user_data *user_data); + int (*cache_invalidate)(struct iommufd_viommu *viommu, + struct iommu_user_data_array *array); }; #if IS_ENABLED(CONFIG_IOMMUFD)