From patchwork Mon Sep 25 13:38:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 726876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5A4BCE7A81 for ; Mon, 25 Sep 2023 13:40:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232291AbjIYNkI (ORCPT ); Mon, 25 Sep 2023 09:40:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231882AbjIYNkF (ORCPT ); Mon, 25 Sep 2023 09:40:05 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E17CB196 for ; Mon, 25 Sep 2023 06:39:53 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-1c4194f769fso44152335ad.3 for ; Mon, 25 Sep 2023 06:39:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1695649193; x=1696253993; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aiGfuZzpdgt2mtsTil9OGkblf0k2xd+WLhVWfEwORCk=; b=Mtu8skHnKMZ1tDeS8xWQ+k9fraQqEy15mdC4zQ0Me5H0qxj7R501Jk2vzha461+grv ILXGp1b3QGaI6oEAngel0mv79laEExmctmmY9C6SJU3LSIk3MXv7PvBiGyucD49PFPyC eMUQBgN0XoYp1oAc4OfTsvNX7OLvvJ3DNPgRgy+2nZ7UG2/s3bsK21G8CMwZ32U2nkTC LkVs0KGwdibQFB/k6uFrPr8IHK9G3i32+SEkOcU1d5/a6l2XVW4YpkJTvvMMSIJM4aOT UpjPO9EhtROsZD7eaM21Xmsv88kmCYkVWRzrXvnowBo3XabRKldn/isyE/lIZ6fu6zFm 3IuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695649193; x=1696253993; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aiGfuZzpdgt2mtsTil9OGkblf0k2xd+WLhVWfEwORCk=; b=KnrOfSN3lN/0HfXWS+AGdGMTETYrjgZpxqYNkKlZyMakBNEBkf728acjynAZam/6qi u2OxbuPkkmenzowVgT8UL0eB7Oq2iReIo56urKXNYwnHA6cwpospvymUnNPbFQVIheG4 DLMAh/+MeheIGeaMWh8ir0PLJ4pqFqWZxBxwTmHWLBmzGt1gzSp+8vipFz8VoUpircFM zGDsbWYfojtGtXBrlyaUNufV83ivcXFQIGMGL/yth51PcECSeoQuO9ZvIXTElqnUOdeb JUtFTU5JXncupJIU6yyqSgjQc5jdGvSHOAzwrW3WcZrNgOo5mOJ4DxbLeqekB7YX6vXK m2fQ== X-Gm-Message-State: AOJu0YzJiMPEZPbB12UhJXuluneItHOx+4ybHHGmNKND4VLOwmZZVKUq i9l+mKoEGircYUQQsN4W/Egtqg== X-Google-Smtp-Source: AGHT+IFAFl3LL8p0HXHNpJm36GoHz0drDmeIuMdA9JnKQikzt531c8bL68ncefHeUvtNOSQlgomJjg== X-Received: by 2002:a17:903:24c:b0:1bf:6ad7:2286 with SMTP id j12-20020a170903024c00b001bf6ad72286mr6241708plh.43.1695649193249; Mon, 25 Sep 2023 06:39:53 -0700 (PDT) Received: from anup-ubuntu-vm.localdomain ([103.97.165.210]) by smtp.gmail.com with ESMTPSA id p11-20020a170902eacb00b001c625d6ffccsm969433pld.129.2023.09.25.06.39.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 06:39:52 -0700 (PDT) From: Anup Patel To: Paolo Bonzini , Atish Patra , Palmer Dabbelt , Paul Walmsley , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Shuah Khan Cc: Andrew Jones , Mayuresh Chitale , devicetree@vger.kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Anup Patel Subject: [PATCH v2 6/9] RISC-V: KVM: Allow Zicond extension for Guest/VM Date: Mon, 25 Sep 2023 19:08:56 +0530 Message-Id: <20230925133859.1735879-7-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230925133859.1735879-1-apatel@ventanamicro.com> References: <20230925133859.1735879-1-apatel@ventanamicro.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org We extend the KVM ISA extension ONE_REG interface to allow KVM user space to detect and enable Zicond extension for Guest/VM. Signed-off-by: Anup Patel Reviewed-by: Andrew Jones --- arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/vcpu_onereg.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index e030c12c7dfc..35ceb38a4eff 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -139,6 +139,7 @@ enum KVM_RISCV_ISA_EXT_ID { KVM_RISCV_ISA_EXT_ZIHPM, KVM_RISCV_ISA_EXT_SMSTATEEN, KVM_RISCV_ISA_EXT_XVENTANACONDOPS, + KVM_RISCV_ISA_EXT_ZICOND, KVM_RISCV_ISA_EXT_MAX, }; diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 17a847a1114b..d3ca4969c985 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -47,6 +47,7 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(ZICBOM), KVM_ISA_EXT_ARR(ZICBOZ), KVM_ISA_EXT_ARR(ZICNTR), + KVM_ISA_EXT_ARR(ZICOND), KVM_ISA_EXT_ARR(ZICSR), KVM_ISA_EXT_ARR(ZIFENCEI), KVM_ISA_EXT_ARR(ZIHINTPAUSE), @@ -95,6 +96,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_ZBB: case KVM_RISCV_ISA_EXT_ZBS: case KVM_RISCV_ISA_EXT_ZICNTR: + case KVM_RISCV_ISA_EXT_ZICOND: case KVM_RISCV_ISA_EXT_ZICSR: case KVM_RISCV_ISA_EXT_ZIFENCEI: case KVM_RISCV_ISA_EXT_ZIHINTPAUSE: