From patchwork Thu Sep 30 18:11:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 514947 Delivered-To: patch@linaro.org Received: by 2002:a02:606e:0:0:0:0:0 with SMTP id d46csp36831jaf; Thu, 30 Sep 2021 11:16:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxOjdjxbSaPcYKbq9Uq1gCKAGTbX5J+MxdfZzGtsv1s+62dWl4WuUQi9nxdganAA3DnqNN6 X-Received: by 2002:a17:906:2682:: with SMTP id t2mr762221ejc.221.1633025796785; Thu, 30 Sep 2021 11:16:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633025796; cv=none; d=google.com; s=arc-20160816; b=A1hQOY3mOUjEDSKY/g8+g5E2abtZJXbxzU8izziGjHw3KDT9VsciiEppKCg1WnwNaq 0eM7lknPN1mxvWrKWiLLSgYNxKOpJ1y44MEJ0ZxfuGNOwWf8/PAIJxqeoPRHroetk4D3 v2mElWknt8jNhXzw4C2SaguFKQYiHRIhfVa8vTVcq4F9SDLhWBO/B72z7LMk90JLxLij VL7/pHhd9i/6jsdLmIef0LXil3PbGN8p1eBigCwxcSxgQc5A8dRObGsmDMjTi613fnP5 cM+793m+7NR86rmqLm835UTj/ZGYhi1G12JwK+ydPQ11FjLi9Z9w5X45/Sv9A2rStzRQ GPIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1hw5vW1ETXAnYe4IDDIBGTEGKM+syP7yp2Bd2aC/D/U=; b=QmuuenMVpmv59eYmil2hNZdkL/XuxxnTJUYFKzccWLwKHGX9IKImgw1SFIF1Ry0bUb uOWXj0UejSmQp+/g8wcGCYwKQPBap69kBMTMNPl0pflJ9u1eHKLPXPd2a4wlqGrlo5V7 ubQLacoz3i1824z1ouB1ZNcMVr1MpPF2Eihzc3SgMucF0wZLsI1B5eHSWjuOpj098p91 bvODkIWO4Qr8YfnPfKCKGTCan5vJpezh6+9uyVKveKuG0bZjAl+blgBjIxXks5aRUgdj J98XazdxfO68Dy5fBrwlI3d+QI1E9X282YszwbVVIl+ZXSOTnBSi26eFLvo7xd86JSiG R9DQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=a5LL+x8a; spf=pass (google.com: domain of linux-kselftest-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kselftest-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t5si4335628edj.607.2021.09.30.11.16.36; Thu, 30 Sep 2021 11:16:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kselftest-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=a5LL+x8a; spf=pass (google.com: domain of linux-kselftest-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kselftest-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353363AbhI3SSS (ORCPT + 5 others); Thu, 30 Sep 2021 14:18:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:57078 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353361AbhI3SSS (ORCPT ); Thu, 30 Sep 2021 14:18:18 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 05A43615A2; Thu, 30 Sep 2021 18:16:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633025795; bh=NEZrppPq+QD20ya5LgSGLQO67xyDmKzQYTQykBzQU/0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=a5LL+x8aO4LymMqQLCV2Vqvwf1/QF7nuMpiTlIPD2iYZeX1RgvZ60iWprOSAFGLe6 5TdmtQ8yRVP40NcXcaqDR18shLPUDnI/YEZkmpkFpoYqLX5iaks6Klo5SzOlBArWNC TbCKvnsJoxMF/N21SzgUwxTEk6aG8a3Mib0oOtDFdKNXxK1lLUYSsis223/QScAvlO he06tW8IHwjzkoBNaD9scU+N3HNACSACG3+CmcRAwpFJ+GqIMQRLNAkCvKcvr56faR icnq3ybFPJvZoHu3axIftQhb0p7+vAtFw6pakUaUu7T0kSyxMwJ8Hv8bRXL0zwCh77 kVwURQEfdQHCg== From: Mark Brown To: Catalin Marinas , Will Deacon , Shuah Khan , Shuah Khan Cc: Alan Hayward , Luis Machado , Salil Akerkar , Basant Kumar Dwivedi , Szabolcs Nagy , linux-arm-kernel@lists.infradead.org, linux-kselftest@vger.kernel.org, Mark Brown Subject: [PATCH v1 21/38] arm64/sme: Implement SVCR context switching Date: Thu, 30 Sep 2021 19:11:27 +0100 Message-Id: <20210930181144.10029-22-broonie@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210930181144.10029-1-broonie@kernel.org> References: <20210930181144.10029-1-broonie@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3708; h=from:subject; bh=NEZrppPq+QD20ya5LgSGLQO67xyDmKzQYTQykBzQU/0=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBhVf3SzEalELgFwPycvepn28xA3wR8PBsdOEQRmXvz HHsPzI+JATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCYVX90gAKCRAk1otyXVSH0PLRB/ 97UL01AdBiCRyZ9KkkmX+sI8w0ec701Rek03oR1mZedxfMb8hBrCeXbNsI24GvrTty75IHiBgnDroS Cbr9pqMWFj2qXOjF3abp02tHXZDE3X0wFZpRxoO6X65NO89e+crXkRP5p0OUsOKkO/MNZ5gkQALTce lYppXCPiYC4UdVKoSG6hl1rB2UTSF4TnJqqgobGtV+4O/bkjYdAJS/7ZFvbxq9N6jIAv01XBOcR6Pe H2w8Nj8xd5icgVwvl27qUAH4BUJZ/k1siVPy6XKZkugW/xEEOUCBaAcpgbCyIKoRn4+cnIo4Cdgas4 quwkOZd+02bgPbza/YOcS8nlBRrL1q X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Precedence: bulk List-ID: X-Mailing-List: linux-kselftest@vger.kernel.org In SME the use of both streaming SVE mode and ZA are tracked through PSTATE.SM and PSTATE.ZA, visible through the system register SVCR. In order to context switch the floating point state for SME we need to context switch the contents of this register as part of context switching the floating point state. Since changing the vector length exits streaming SVE mode and disables ZA we also make sure we update SVCR appropraitely when setting vector length, and similarly ensure that new threads have streaming SVE mode and ZA disabled. Signed-off-by: Mark Brown --- arch/arm64/include/asm/processor.h | 1 + arch/arm64/include/asm/thread_info.h | 1 + arch/arm64/kernel/fpsimd.c | 11 +++++++++++ arch/arm64/kernel/process.c | 2 ++ 4 files changed, 15 insertions(+) -- 2.20.1 diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index 51eca2513cb5..3c235e165725 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -168,6 +168,7 @@ struct thread_struct { u64 mte_ctrl; #endif u64 sctlr_user; + u64 svcr; u64 tpidr2_el0; }; diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 5c4355204f4a..03cb88f63317 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -81,6 +81,7 @@ int arch_dup_task_struct(struct task_struct *dst, #define TIF_SVE_VL_INHERIT 24 /* Inherit SVE vl_onexec across exec */ #define TIF_SSBD 25 /* Wants SSB mitigation */ #define TIF_TAGGED_ADDR 26 /* Allow tagged user addresses */ +#define TIF_SME 27 /* SME in use */ #define TIF_SME_VL_INHERIT 28 /* Inherit SME vl_onexec across exec */ #define _TIF_SIGPENDING (1 << TIF_SIGPENDING) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index e673a1d6a618..25193fd04860 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -355,6 +355,9 @@ static void task_fpsimd_load(void) WARN_ON(!system_supports_fpsimd()); WARN_ON(!have_cpu_fpsimd_context()); + if (IS_ENABLED(CONFIG_ARM64_SME) && test_thread_flag(TIF_SME)) + write_sysreg_s(current->thread.svcr, SYS_SVCR_EL0); + if (IS_ENABLED(CONFIG_ARM64_SVE) && test_thread_flag(TIF_SVE)) { sve_set_vq(sve_vq_from_vl(task_get_sve_vl(current)) - 1); sve_load_state(sve_pffr(¤t->thread), @@ -380,6 +383,10 @@ static void fpsimd_save(void) if (test_thread_flag(TIF_FOREIGN_FPSTATE)) return; + if (IS_ENABLED(CONFIG_ARM64_SME) && + test_thread_flag(TIF_SME)) + current->thread.svcr = read_sysreg_s(SYS_SVCR_EL0); + if (IS_ENABLED(CONFIG_ARM64_SVE) && test_thread_flag(TIF_SVE)) { if (WARN_ON(sve_get_vl() != last->sve_vl)) { @@ -734,6 +741,10 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type, if (test_and_clear_tsk_thread_flag(task, TIF_SVE)) sve_to_fpsimd(task); + if (system_supports_sme() && type == ARM64_VEC_SME) + task->thread.svcr &= ~(SYS_SVCR_EL0_SM_MASK | + SYS_SVCR_EL0_ZA_MASK); + if (task == current) put_cpu_fpsimd_context(); diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 0640b51d4289..c5544b669a58 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -307,6 +307,8 @@ int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) dst->thread.sve_state = NULL; clear_tsk_thread_flag(dst, TIF_SVE); + dst->thread.svcr = 0; + /* clear any pending asynchronous tag fault raised by the parent */ clear_tsk_thread_flag(dst, TIF_MTE_ASYNC_FAULT);