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Show patches with
: Submitter =
Anup Patel
| 25 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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Patch
Series
S/W/F
Date
Submitter
Delegate
State
[5/5] KVM: riscv: selftests: Add Zacas extension to get-reg-list test
KVM RISC-V report few more ISA extensions through ONE_REG
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2024-02-14
Anup Patel
Accepted
[4/5] RISC-V: KVM: Allow Zacas extension for Guest/VM
KVM RISC-V report few more ISA extensions through ONE_REG
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2024-02-14
Anup Patel
Accepted
[3/5] KVM: riscv: selftests: Add Ztso extension to get-reg-list test
KVM RISC-V report few more ISA extensions through ONE_REG
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2024-02-14
Anup Patel
Accepted
[2/5] RISC-V: KVM: Allow Ztso extension for Guest/VM
KVM RISC-V report few more ISA extensions through ONE_REG
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2024-02-14
Anup Patel
Accepted
[1/5] RISC-V: KVM: Forward SEED CSR access to user space
KVM RISC-V report few more ISA extensions through ONE_REG
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2024-02-14
Anup Patel
Accepted
[v3,5/6] KVM: riscv: selftests: Add smstateen registers to get-reg-list test
[v3,1/6] dt-bindings: riscv: Add Zicond extension entry
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2023-10-03
Anup Patel
Accepted
[v3,3/6] RISC-V: KVM: Allow Zicond extension for Guest/VM
[v3,1/6] dt-bindings: riscv: Add Zicond extension entry
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2023-10-03
Anup Patel
Accepted
[v3,1/6] dt-bindings: riscv: Add Zicond extension entry
[v3,1/6] dt-bindings: riscv: Add Zicond extension entry
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2023-10-03
Anup Patel
Accepted
[v2,9/9] KVM: riscv: selftests: Add condops extensions to get-reg-list test
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
New
[v2,8/9] KVM: riscv: selftests: Add smstateen registers to get-reg-list test
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
Superseded
[v2,7/9] KVM: riscv: selftests: Add senvcfg register to get-reg-list test
KVM RISC-V Conditional Operations
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-
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2023-09-25
Anup Patel
Accepted
[v2,6/9] RISC-V: KVM: Allow Zicond extension for Guest/VM
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
Superseded
[v2,5/9] RISC-V: KVM: Allow XVentanaCondOps extension for Guest/VM
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
New
[v2,4/9] RISC-V: Detect Zicond from ISA string
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
Accepted
[v2,3/9] dt-bindings: riscv: Add Zicond extension entry
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
Superseded
[v2,2/9] RISC-V: Detect XVentanaCondOps from ISA string
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
New
[v2,1/9] dt-bindings: riscv: Add XVentanaCondOps extension entry
KVM RISC-V Conditional Operations
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-
-
2023-09-25
Anup Patel
New
[7/7] KVM: riscv: selftests: Add condops extensions to get-reg-list test
[1/7] RISC-V: Detect XVentanaCondOps from ISA string
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-
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2023-09-19
Anup Patel
New
[5/7] KVM: riscv: selftests: Add senvcfg register to get-reg-list test
[1/7] RISC-V: Detect XVentanaCondOps from ISA string
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-
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2023-09-19
Anup Patel
Superseded
[3/7] RISC-V: KVM: Allow XVentanaCondOps extension for Guest/VM
[1/7] RISC-V: Detect XVentanaCondOps from ISA string
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-
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2023-09-19
Anup Patel
Superseded
[1/7] RISC-V: Detect XVentanaCondOps from ISA string
[1/7] RISC-V: Detect XVentanaCondOps from ISA string
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-
-
2023-09-19
Anup Patel
New
[4/4] KVM: riscv: selftests: Selectively filter-out AIA registers
KVM RISC-V fixes for ONE_REG interface
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2023-09-18
Anup Patel
Accepted
[3/4] KVM: riscv: selftests: Fix ISA_EXT register handling in get-reg-list
KVM RISC-V fixes for ONE_REG interface
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2023-09-18
Anup Patel
Accepted
[2/4] RISC-V: KVM: Fix riscv_vcpu_get_isa_ext_single() for missing extensions
KVM RISC-V fixes for ONE_REG interface
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2023-09-18
Anup Patel
Accepted
[1/4] RISC-V: KVM: Fix KVM_GET_REG_LIST API for ISA_EXT registers
KVM RISC-V fixes for ONE_REG interface
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2023-09-18
Anup Patel
Accepted